2012-09-28 09:56:37 +00:00
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/*
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* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2012-09-28 09:56:37 +00:00
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*/
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#ifndef __CONFIG_ZYNQ_H
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#define __CONFIG_ZYNQ_H
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#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
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#define CONFIG_ZYNQ
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/* CPU clock */
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#define CONFIG_CPU_FREQ_HZ 800000000
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#define CONFIG_SYS_HZ 1000
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/* Ram */
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_TEXT_BASE 0
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#define CONFIG_SYS_SDRAM_BASE 0
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#define CONFIG_SYS_SDRAM_SIZE 0x40000000
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
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/* The following table includes the supported baudrates */
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#define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
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#define CONFIG_BAUDRATE 115200
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/* XPSS Serial driver */
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#define CONFIG_ZYNQ_SERIAL
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#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000
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#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
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#define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000
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/* Ethernet driver */
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#define CONFIG_NET_MULTI
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#define CONFIG_ZYNQ_GEM
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2013-04-12 14:33:08 +00:00
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#define CONFIG_ZYNQ_GEM0
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2013-04-04 17:13:07 +00:00
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
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2012-09-28 09:56:37 +00:00
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2013-04-22 12:56:49 +00:00
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#define CONFIG_ZYNQ_SDHCI
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#define CONFIG_ZYNQ_SDHCI0
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/* MMC */
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#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
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# define CONFIG_MMC
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# define CONFIG_GENERIC_MMC
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# define CONFIG_SDHCI
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# define CONFIG_ZYNQ_SDHCI
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# define CONFIG_CMD_MMC
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# define CONFIG_CMD_FAT
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# define CONFIG_SUPPORT_VFAT
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# define CONFIG_CMD_EXT2
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# define CONFIG_DOS_PARTITION
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#endif
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2013-04-22 13:21:33 +00:00
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#define CONFIG_ZYNQ_I2C0
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/* I2C */
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#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
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# define CONFIG_CMD_I2C
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# define CONFIG_ZYNQ_I2C
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# define CONFIG_HARD_I2C
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# define CONFIG_SYS_I2C_SPEED 100000
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# define CONFIG_SYS_I2C_SLAVE 1
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#endif
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2013-02-04 14:23:17 +00:00
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#if defined(CONFIG_ZYNQ_DCC)
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# define CONFIG_ARM_DCC
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# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
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#endif
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2013-08-06 19:42:06 +00:00
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#define CONFIG_ZYNQ_SPI
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/* SPI */
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#ifdef CONFIG_ZYNQ_SPI
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# define CONFIG_SPI_FLASH
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# define CONFIG_SPI_FLASH_SST
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# define CONFIG_CMD_SF
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#endif
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2013-04-22 13:43:02 +00:00
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/* Enable the PL to be downloaded */
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#define CONFIG_FPGA
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#define CONFIG_FPGA_XILINX
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#define CONFIG_FPGA_ZYNQPL
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#define CONFIG_CMD_FPGA
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2012-09-28 09:56:37 +00:00
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#define CONFIG_BOOTP_SERVERIP
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#define CONFIG_BOOTP_MAY_FAIL
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/* MII and Phylib */
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#define CONFIG_MII
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MARVELL
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/* Environment */
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_ENV_SIZE 0x10000
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_MALLOC_LEN 0x400000
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#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_PROMPT "U-Boot> "
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_LOAD_ADDR 0
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#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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/* OF */
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#define CONFIG_FIT
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#define CONFIG_OF_LIBFDT
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/* Commands */
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#include <config_cmd_default.h>
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#endif /* __CONFIG_ZYNQ_H */
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