2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2011-11-11 21:55:37 +00:00
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#ifndef _MPC83XX_GPIO_H_
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#define _MPC83XX_GPIO_H_
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/*
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* The MCP83xx's 1-2 GPIO controllers each with 32 bits.
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*/
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2019-01-21 08:17:25 +00:00
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#if defined(CONFIG_ARCH_MPC8313) || defined(CONFIG_ARCH_MPC8308) || \
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defined(CONFIG_ARCH_MPC8315)
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2011-11-11 21:55:37 +00:00
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#define MPC83XX_GPIO_CTRLRS 1
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2019-12-12 09:18:52 +00:00
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#elif defined(CONFIG_ARCH_MPC834X) || defined(CONFIG_ARCH_MPC837X) || \
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defined(CONFIG_ARCH_MPC8309)
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2011-11-11 21:55:37 +00:00
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#define MPC83XX_GPIO_CTRLRS 2
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#else
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#define MPC83XX_GPIO_CTRLRS 0
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#endif
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#define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS)
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2019-01-21 08:18:08 +00:00
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struct mpc8xxx_gpio_plat {
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ulong addr;
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unsigned long size;
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uint ngpios;
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};
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#ifndef DM_GPIO
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2011-11-11 21:55:37 +00:00
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void mpc83xx_gpio_init_f(void);
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void mpc83xx_gpio_init_r(void);
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2019-01-21 08:18:08 +00:00
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#endif /* DM_GPIO */
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2011-11-11 21:55:37 +00:00
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#endif /* MPC83XX_GPIO_H_ */
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