2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2015-08-11 16:19:49 +00:00
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc
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* Peng Fan <Peng.Fan@freescale.com>
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*/
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#ifndef __PFUZE3000_PMIC_H_
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#define __PFUZE3000_PMIC_H_
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/* PFUZE3000 registers */
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enum {
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PFUZE3000_DEVICEID = 0x00,
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PFUZE3000_REVID = 0x03,
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PFUZE3000_FABID = 0x04,
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PFUZE3000_INTSTAT0 = 0x05,
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PFUZE3000_INTMASK0 = 0x06,
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PFUZE3000_INTSENSE0 = 0x07,
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PFUZE3000_INTSTAT1 = 0x08,
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PFUZE3000_INTMASK1 = 0x09,
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PFUZE3000_INTSENSE1 = 0x0A,
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PFUZE3000_INTSTAT3 = 0x0E,
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PFUZE3000_INTMASK3 = 0x0F,
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PFUZE3000_INTSENSE3 = 0x10,
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PFUZE3000_INTSTAT4 = 0x11,
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PFUZE3000_INTMASK4 = 0x12,
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PFUZE3000_INTSENSE4 = 0x13,
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PFUZE3000_COINCTL = 0x1A,
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PFUZE3000_PWRCTL = 0x1B,
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PFUZE3000_MEMA = 0x1C,
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PFUZE3000_MEMB = 0x1D,
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PFUZE3000_MEMC = 0x1E,
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PFUZE3000_MEMD = 0x1F,
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PFUZE3000_SW1AVOLT = 0x20,
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PFUZE3000_SW1ASTBY = 0x21,
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PFUZE3000_SW1AOFF = 0x22,
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PFUZE3000_SW1AMODE = 0x23,
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PFUZE3000_SW1ACONF = 0x24,
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PFUZE3000_SW1BVOLT = 0x2E,
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PFUZE3000_SW1BSTBY = 0x2F,
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PFUZE3000_SW1BOFF = 0x30,
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PFUZE3000_SW1BMODE = 0x31,
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PFUZE3000_SW1BCONF = 0x32,
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PFUZE3000_SW2VOLT = 0x35,
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PFUZE3000_SW2STBY = 0x36,
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PFUZE3000_SW2OFF = 0x37,
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PFUZE3000_SW2MODE = 0x38,
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PFUZE3000_SW2CONF = 0x39,
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PFUZE3000_SW3VOLT = 0x3C,
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PFUZE3000_SW3STBY = 0x3D,
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PFUZE3000_SW3OFF = 0x3E,
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PFUZE3000_SW3MODE = 0x3F,
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PFUZE3000_SW3CONF = 0x40,
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PFUZE3000_SWBSTCTL = 0x66,
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PFUZE3000_LDOGCTL = 0x69,
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PFUZE3000_VREFDDRCTL = 0x6A,
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PFUZE3000_VSNVSCTL = 0x6B,
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PFUZE3000_VLDO1CTL = 0x6C,
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PFUZE3000_VLDO2CTL = 0x6D,
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PFUZE3000_VCC_SDCTL = 0x6E,
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PFUZE3000_V33CTL = 0x6F,
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PFUZE3000_VLDO3CTL = 0x70,
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PFUZE3000_VLD4CTL = 0x71,
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2018-04-25 17:06:00 +00:00
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PFUZE3000_NUM_OF_REGS = 0x100,
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2015-08-11 16:19:49 +00:00
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};
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int power_pfuze3000_init(unsigned char bus);
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2016-12-06 17:38:24 +00:00
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/* Voltage Configuration */
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#define PFUZE3000_SW1AB_SETP(x) ((x - 7000) / 250)
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#define PFUZE3000_SW3_SETP(x) ((x - 9000) / 500)
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#define PFUZE3000_VLDO_SETP(x) ((x - 8000) / 500)
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2015-08-11 16:19:49 +00:00
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#endif
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