2018-09-11 10:31:07 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2018 Emlid Limited
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*/
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#include <common.h>
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#include <dm.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2018-09-11 10:31:07 +00:00
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#include <dm/pinctrl.h>
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#include <dm/read.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <asm/cpu.h>
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#include <asm/scu.h>
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#include <linux/io.h>
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2023-09-15 00:21:46 +00:00
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#include <linux/printk.h>
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2018-09-11 10:31:07 +00:00
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#define BUFCFG_OFFSET 0x100
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#define MRFLD_FAMILY_LEN 0x400
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/* These are taken from Linux kernel */
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#define MRFLD_PINMODE_MASK 0x07
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#define pin_to_bufno(f, p) ((p) - (f)->pin_base)
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struct mrfld_family {
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unsigned int family_number;
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unsigned int pin_base;
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size_t npins;
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void __iomem *regs;
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};
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#define MRFLD_FAMILY(b, s, e) \
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{ \
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.family_number = (b), \
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.pin_base = (s), \
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.npins = (e) - (s) + 1, \
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}
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2021-10-27 11:28:09 +00:00
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/* Now we only support SD/SDIO and I2C families of pins */
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2018-09-11 10:31:07 +00:00
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static struct mrfld_family mrfld_families[] = {
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2021-10-27 11:28:09 +00:00
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MRFLD_FAMILY(3, 37, 56),
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2018-09-11 10:31:07 +00:00
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MRFLD_FAMILY(7, 101, 114),
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};
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struct mrfld_pinctrl {
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const struct mrfld_family *families;
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size_t nfamilies;
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};
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static const struct mrfld_family *
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mrfld_get_family(struct mrfld_pinctrl *mp, unsigned int pin)
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{
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const struct mrfld_family *family;
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unsigned int i;
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for (i = 0; i < mp->nfamilies; i++) {
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family = &mp->families[i];
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if (pin >= family->pin_base &&
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pin < family->pin_base + family->npins)
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return family;
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}
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pr_err("failed to find family for pin %u\n", pin);
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return NULL;
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}
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static void __iomem *
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mrfld_get_bufcfg(struct mrfld_pinctrl *pinctrl, unsigned int pin)
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{
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const struct mrfld_family *family;
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unsigned int bufno;
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family = mrfld_get_family(pinctrl, pin);
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if (!family)
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return NULL;
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bufno = pin_to_bufno(family, pin);
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return family->regs + BUFCFG_OFFSET + bufno * 4;
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}
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static void
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mrfld_setup_families(void *base_addr,
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struct mrfld_family *families, unsigned int nfam)
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{
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for (int i = 0; i < nfam; i++) {
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struct mrfld_family *family = &families[i];
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family->regs = base_addr +
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family->family_number * MRFLD_FAMILY_LEN;
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}
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}
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static int mrfld_pinconfig_protected(unsigned int pin, u32 mask, u32 bits)
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{
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struct mrfld_pinctrl *pinctrl;
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struct udevice *dev;
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void __iomem *bufcfg;
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u32 v, value;
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int ret;
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ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
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if (ret)
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return ret;
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pinctrl = dev_get_priv(dev);
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bufcfg = mrfld_get_bufcfg(pinctrl, pin);
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if (!bufcfg)
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return -EINVAL;
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value = readl(bufcfg);
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v = (value & ~mask) | (bits & mask);
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debug("scu: v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n",
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v, (u32)bufcfg, bits, mask, bufcfg);
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2021-10-27 14:23:38 +00:00
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return scu_ipc_raw_command(IPCMSG_INDIRECT_WRITE, 0, &v, 4, NULL, 0, (u32)bufcfg, 0);
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2018-09-11 10:31:07 +00:00
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}
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2021-10-27 11:28:09 +00:00
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static int mrfld_pinconfig(unsigned int pin, u32 mask, u32 bits)
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{
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struct mrfld_pinctrl *pinctrl;
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struct udevice *dev;
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void __iomem *bufcfg;
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u32 v, value;
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int ret;
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ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
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if (ret)
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return ret;
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pinctrl = dev_get_priv(dev);
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bufcfg = mrfld_get_bufcfg(pinctrl, pin);
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if (!bufcfg)
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return -EINVAL;
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value = readl(bufcfg);
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v = (value & ~mask) | (bits & mask);
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writel(v, bufcfg);
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debug("v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n",
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v, (u32)bufcfg, bits, mask, bufcfg);
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return 0;
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}
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2018-09-11 10:31:07 +00:00
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static int mrfld_pinctrl_cfg_pin(ofnode pin_node)
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{
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bool is_protected;
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int pad_offset;
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int mode;
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u32 mask;
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int ret;
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pad_offset = ofnode_read_s32_default(pin_node, "pad-offset", -1);
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if (pad_offset == -1)
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return -EINVAL;
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mode = ofnode_read_s32_default(pin_node, "mode-func", -1);
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if (mode == -1)
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return -EINVAL;
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mask = MRFLD_PINMODE_MASK;
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/* We don't support modes not in range 0..7 */
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if (mode & ~mask)
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return -ENOTSUPP;
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2021-10-27 14:23:37 +00:00
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is_protected = ofnode_read_bool(pin_node, "protected");
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2021-10-27 11:28:09 +00:00
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if (is_protected)
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ret = mrfld_pinconfig_protected(pad_offset, mask, mode);
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else
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ret = mrfld_pinconfig(pad_offset, mask, mode);
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2021-10-27 14:23:38 +00:00
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if (ret)
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pr_err("Failed to set mode for pin %u (%d)\n", pad_offset, ret);
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2018-09-11 10:31:07 +00:00
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return ret;
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}
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static int tangier_pinctrl_probe(struct udevice *dev)
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{
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void *base_addr = syscon_get_first_range(X86_SYSCON_PINCONF);
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struct mrfld_pinctrl *pinctrl = dev_get_priv(dev);
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ofnode pin_node;
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int ret;
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mrfld_setup_families(base_addr, mrfld_families,
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ARRAY_SIZE(mrfld_families));
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pinctrl->families = mrfld_families;
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pinctrl->nfamilies = ARRAY_SIZE(mrfld_families);
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ofnode_for_each_subnode(pin_node, dev_ofnode(dev)) {
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ret = mrfld_pinctrl_cfg_pin(pin_node);
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if (ret) {
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pr_err("%s: invalid configuration for the pin %ld\n",
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__func__, pin_node.of_offset);
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}
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}
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return 0;
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}
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static const struct udevice_id tangier_pinctrl_match[] = {
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{ .compatible = "intel,pinctrl-tangier", .data = X86_SYSCON_PINCONF },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(tangier_pinctrl) = {
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.name = "tangier_pinctrl",
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.id = UCLASS_SYSCON,
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.of_match = tangier_pinctrl_match,
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.probe = tangier_pinctrl_probe,
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2020-12-03 23:55:17 +00:00
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.priv_auto = sizeof(struct mrfld_pinctrl),
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2018-09-11 10:31:07 +00:00
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};
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