2019-08-21 19:14:45 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 Fraunhofer AISEC,
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* Lukas Auer <lukas.auer@aisec.fraunhofer.de>
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*/
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2019-11-14 19:57:39 +00:00
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#include <cpu_func.h>
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2019-12-28 17:45:07 +00:00
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#include <hang.h>
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2020-05-10 17:40:02 +00:00
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#include <init.h>
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2020-05-10 17:40:05 +00:00
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#include <log.h>
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2019-08-21 19:14:45 +00:00
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#include <spl.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2019-08-21 19:14:45 +00:00
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#include <asm/smp.h>
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2022-03-04 15:43:05 +00:00
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#include <asm/system.h>
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2019-08-21 19:14:45 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2020-08-03 06:09:01 +00:00
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__weak int spl_board_init_f(void)
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{
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return 0;
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}
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2019-08-21 19:14:45 +00:00
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__weak void board_init_f(ulong dummy)
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{
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int ret;
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ret = spl_early_init();
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if (ret)
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panic("spl_early_init() failed: %d\n", ret);
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2023-08-22 03:16:56 +00:00
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riscv_cpu_setup();
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2019-08-21 19:14:45 +00:00
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preloader_console_init();
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2020-08-03 06:09:01 +00:00
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ret = spl_board_init_f();
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if (ret)
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panic("spl_board_init_f() failed: %d\n", ret);
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2019-08-21 19:14:45 +00:00
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}
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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typedef void __noreturn (*image_entry_riscv_t)(ulong hart, void *dtb);
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void *fdt_blob;
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2020-08-15 07:49:26 +00:00
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__maybe_unused int ret;
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2019-08-21 19:14:45 +00:00
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#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL)
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fdt_blob = spl_image->fdt_addr;
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#else
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fdt_blob = (void *)gd->fdt_blob;
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#endif
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image_entry_riscv_t image_entry =
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(image_entry_riscv_t)spl_image->entry_point;
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invalidate_icache_all();
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debug("image entry point: 0x%lX\n", spl_image->entry_point);
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2020-04-16 15:09:30 +00:00
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#ifdef CONFIG_SPL_SMP
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2019-12-08 22:28:51 +00:00
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ret = smp_call_function(spl_image->entry_point, (ulong)fdt_blob, 0, 0);
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2019-08-21 19:14:45 +00:00
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if (ret)
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hang();
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#endif
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image_entry(gd->arch.boot_hart, fdt_blob);
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}
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