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u-boot/configs/socfpga_is1_defconfig

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ARM: socfpga: add support for IS1 board This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>
2016-06-07 10:37:23 +00:00
CONFIG_ARM=y
CONFIG_ARCH_SOCFPGA=y
Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL" This reverts commit 90c08d9e08c7a108ab904f3bbdeb558081757892. I took a closer look at this after the commit was applied, and found CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is actually too big for some boards. Perhaps 0x800 is enough, but the situation varies board by board. Let's postpone our decision until we come up with a better idea. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-19 12:40:26 +00:00
CONFIG_SYS_MALLOC_F_LEN=0x2000
ARM: socfpga: add support for IS1 board This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>
2016-06-07 10:37:23 +00:00
CONFIG_TARGET_SOCFPGA_IS1=y
CONFIG_SPL_STACK_R_ADDR=0x00800000
CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1"
CONFIG_FIT=y
common, kconfig: move VERSION_VARIABLE to Kconfig move VERSION_VARIABLE from board config file into a Kconfig option. Signed-off-by: Heiko Schocher <hs@denx.de>
2016-09-09 06:12:49 +00:00
CONFIG_VERSION_VARIABLE=y
Kconfig: Move SPL settings into their own file Move the SPL settings into common/spl where most of the SPL code is kept. Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-13 05:18:22 +00:00
CONFIG_SPL=y
CONFIG_SPL_STACK_R=y
ARM: socfpga: add support for IS1 board This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>
2016-06-07 10:37:23 +00:00
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
configs: Resync with savedefconfig Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-08 20:11:59 +00:00
CONFIG_SPL_DM=y
ARM: socfpga: add support for IS1 board This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>
2016-06-07 10:37:23 +00:00
CONFIG_SPL_DM_SEQ_ALIAS=y
configs: Resync with savedefconfig Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-08 20:11:59 +00:00
CONFIG_DM_GPIO=y
ARM: socfpga: add support for IS1 board This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>
2016-06-07 10:37:23 +00:00
CONFIG_DWAPB_GPIO=y
CONFIG_SYS_I2C_DW=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_CADENCE_QSPI=y
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