2019-05-31 16:00:20 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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2021-10-09 20:41:11 +00:00
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* Copyright 2019-2021 Toradex
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2019-05-31 16:00:20 +00:00
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*/
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#ifndef __APALIS_IMX8_H
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#define __APALIS_IMX8_H
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#include <asm/arch/imx-regs.h>
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#include <linux/sizes.h>
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2022-10-29 00:27:13 +00:00
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#define CFG_SYS_FSL_ESDHC_ADDR 0
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2019-05-31 16:00:20 +00:00
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#define USDHC1_BASE_ADDR 0x5b010000
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#define USDHC2_BASE_ADDR 0x5b020000
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/* Networking */
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#define MEM_LAYOUT_ENV_SETTINGS \
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"fdt_addr_r=0x84000000\0" \
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"kernel_addr_r=0x82000000\0" \
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"ramdisk_addr_r=0x94400000\0" \
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"scriptaddr=0x87000000\0"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(MMC, mmc, 0) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#undef BOOTENV_RUN_NET_USB_START
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#define BOOTENV_RUN_NET_USB_START ""
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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MEM_LAYOUT_ENV_SETTINGS \
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2021-10-09 20:41:11 +00:00
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"boot_file=Image\0" \
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2022-04-13 09:33:27 +00:00
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"boot_script_dhcp=boot.scr\0" \
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2019-05-31 16:00:20 +00:00
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"console=ttyLP1 earlycon\0" \
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"fdt_addr=0x83000000\0" \
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"fdt_file=fsl-imx8qm-apalis-eval.dtb\0" \
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"fdtfile=fsl-imx8qm-apalis-eval.dtb\0" \
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"finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
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"initrd_addr=0x83800000\0" \
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"initrd_high=0xffffffffffffffff\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=PARTUUID=${uuid} rootwait " \
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"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
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2021-12-11 19:55:52 +00:00
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"mmcpart=1\0" \
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2019-05-31 16:00:20 +00:00
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"panel=NULL\0" \
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"script=boot.scr\0" \
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"update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \
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"if test \"$confirm\" = \"y\"; then " \
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"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
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"${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \
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"${blkcnt}; fi\0"
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/* Link Definitions */
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/* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */
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2022-10-29 00:27:13 +00:00
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#define CFG_SYS_FSL_USDHC_NUM 3
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2019-05-31 16:00:20 +00:00
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2022-11-16 18:10:37 +00:00
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#define CFG_SYS_SDRAM_BASE 0x80000000
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2019-05-31 16:00:20 +00:00
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#define PHYS_SDRAM_1 0x80000000
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#define PHYS_SDRAM_2 0x880000000
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#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
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#define PHYS_SDRAM_2_SIZE SZ_2G /* 2 GB */
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#endif /* __APALIS_IMX8_H */
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