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20 lines
551 B
C
20 lines
551 B
C
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/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2020 Intel Corporation <www.intel.com>
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*
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*/
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#ifndef _SECURE_REG_HELPER_H_
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#define _SECURE_REG_HELPER_H_
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#define SOCFPGA_SECURE_REG_SYSMGR_SOC64_SDMMC 1
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#define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC0 2
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#define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC1 3
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#define SOCFPGA_SECURE_REG_SYSMGR_SOC64_EMAC2 4
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int socfpga_secure_reg_read32(u32 id, u32 *val);
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int socfpga_secure_reg_write32(u32 id, u32 val);
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int socfpga_secure_reg_update32(u32 id, u32 mask, u32 val);
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#endif /* _SECURE_REG_HELPER_H_ */
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