mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-27 05:23:34 +00:00
269 lines
5 KiB
ArmAsm
269 lines
5 KiB
ArmAsm
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/*
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* (C) Copyright 2007
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* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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.global lowlevel_init
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.text
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.align 2
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lowlevel_init:
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mov.l WTCSR_A,r1
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mov.l WTCSR_D,r0
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mov.w r0,@r1
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mov.l WTCNT_A,r1
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mov.l WTCNT_D,r0
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mov.w r0,@r1
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mov.l FRQCR_A,r1
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mov.l FRQCR_D,r0
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mov.w r0,@r1
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mov.l UCLKCR_A,r1
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mov.l UCLKCR_D,r0
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mov.w r0,@r1
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mov.l CMNCR_A, r1
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mov.l CMNCR_D, r0
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mov.l r0, @r1
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mov.l CS0BCR_A, r1
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mov.l CS0BCR_D, r0
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mov.l r0, @r1
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mov.l CS2BCR_A, r1
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mov.l CS2BCR_D, r0
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mov.l r0, @r1
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mov.l CS3BCR_A, r1
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mov.l CS3BCR_D, r0
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mov.l r0, @r1
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mov.l CS4BCR_A, r1
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mov.l CS4BCR_D, r0
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mov.l r0, @r1
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mov.l CS5ABCR_A, r1
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mov.l CS5ABCR_D, r0
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mov.l r0, @r1
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mov.l CS5BBCR_A, r1
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mov.l CS5BBCR_D, r0
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mov.l r0, @r1
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mov.l CS6ABCR_A, r1
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mov.l CS6ABCR_D, r0
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mov.l r0, @r1
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mov.l CS6BBCR_A, r1
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mov.l CS6BBCR_D, r0
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mov.l r0, @r1
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mov.l CS0WCR_A, r1
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mov.l CS0WCR_D, r0
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mov.l r0, @r1
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mov.l CS2WCR_A, r1
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mov.l CS2WCR_D, r0
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mov.l r0, @r1
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mov.l CS3WCR_A, r1
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mov.l CS3WCR_D, r0
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mov.l r0, @r1
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mov.l CS4WCR_A, r1
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mov.l CS4WCR_D, r0
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mov.l r0, @r1
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mov.l CS5AWCR_A, r1
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mov.l CS5AWCR_D, r0
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mov.l r0, @r1
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mov.l CS5BWCR_A, r1
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mov.l CS5BWCR_D, r0
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mov.l r0, @r1
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mov.l CS6AWCR_A, r1
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mov.l CS6AWCR_D, r0
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mov.l r0, @r1
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mov.l CS6BWCR_A, r1
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mov.l CS6BWCR_D, r0
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mov.l r0, @r1
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mov.l SDCR_A, r1
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mov.l SDCR_D1, r0
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mov.l r0, @r1
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mov.l RTCSR_A, r1
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mov.l RTCSR_D, r0
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mov.l r0, @r1
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mov.l RTCNT_A, r1
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mov.l RTCNT_D, r0
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mov.l r0, @r1
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mov.l RTCOR_A, r1
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mov.l RTCOR_D, r0
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mov.l r0, @r1
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mov.l SDCR_A, r1
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mov.l SDCR_D2, r0
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mov.l r0, @r1
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mov.l SDMR3_A, r1
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mov.l SDMR3_D, r0
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mov.w r0, @r1
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mov.l PCCR_A, r1
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mov.l PCCR_D, r0
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mov.w r0, @r1
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mov.l PDCR_A, r1
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mov.l PDCR_D, r0
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mov.w r0, @r1
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mov.l PECR_A, r1
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mov.l PECR_D, r0
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mov.w r0, @r1
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mov.l PGCR_A, r1
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mov.l PGCR_D, r0
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mov.w r0, @r1
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mov.l PHCR_A, r1
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mov.l PHCR_D, r0
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mov.w r0, @r1
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mov.l PPCR_A, r1
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mov.l PPCR_D, r0
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mov.w r0, @r1
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mov.l PTCR_A, r1
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mov.l PTCR_D, r0
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mov.w r0, @r1
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mov.l PVCR_A, r1
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mov.l PVCR_D, r0
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mov.w r0, @r1
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mov.l PSELA_A, r1
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mov.l PSELA_D, r0
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mov.w r0, @r1
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mov.l CCR_A, r1
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mov.l CCR_D, r0
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mov.l r0, @r1
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mov.l LED_A, r1
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mov.l LED_D, r0
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mov.b r0, @r1
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rts
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nop
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.align 4
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FRQCR_A: .long 0xA415FF80 /* FRQCR Address */
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WTCNT_A: .long 0xA415FF84
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WTCSR_A: .long 0xA415FF86
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UCLKCR_A: .long 0xA40A0008
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FRQCR_D: .long 0x1103 /* I:B:P=8:4:2 */
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WTCNT_D: .long 0x5A00
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WTCSR_D: .long 0xA506
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UCLKCR_D: .long 0xA5C0
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#define BSC_BASE 0xA4FD0000
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CMNCR_A: .long BSC_BASE
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CS0BCR_A: .long BSC_BASE + 0x04
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CS2BCR_A: .long BSC_BASE + 0x08
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CS3BCR_A: .long BSC_BASE + 0x0C
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CS4BCR_A: .long BSC_BASE + 0x10
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CS5ABCR_A: .long BSC_BASE + 0x14
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CS5BBCR_A: .long BSC_BASE + 0x18
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CS6ABCR_A: .long BSC_BASE + 0x1C
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CS6BBCR_A: .long BSC_BASE + 0x20
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CS0WCR_A: .long BSC_BASE + 0x24
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CS2WCR_A: .long BSC_BASE + 0x28
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CS3WCR_A: .long BSC_BASE + 0x2C
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CS4WCR_A: .long BSC_BASE + 0x30
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CS5AWCR_A: .long BSC_BASE + 0x34
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CS5BWCR_A: .long BSC_BASE + 0x38
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CS6AWCR_A: .long BSC_BASE + 0x3C
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CS6BWCR_A: .long BSC_BASE + 0x40
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SDCR_A: .long BSC_BASE + 0x44
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RTCSR_A: .long BSC_BASE + 0x48
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RTCNT_A: .long BSC_BASE + 0x4C
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RTCOR_A: .long BSC_BASE + 0x50
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SDMR3_A: .long BSC_BASE + 0x58C0
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CMNCR_D: .long 0x00000010
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CS0BCR_D: .long 0x36DB0400
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CS2BCR_D: .long 0x36DB0400
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CS3BCR_D: .long 0x36DB4600
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CS4BCR_D: .long 0x36DB0400
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CS5ABCR_D: .long 0x36DB0400
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CS5BBCR_D: .long 0x36DB0200
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CS6ABCR_D: .long 0x36DB0400
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CS6BBCR_D: .long 0x36DB0400
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CS0WCR_D: .long 0x00000B01
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CS2WCR_D: .long 0x00000500
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CS3WCR_D: .long 0x00006D1B
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CS4WCR_D: .long 0x00000500
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CS5AWCR_D: .long 0x00000500
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CS5BWCR_D: .long 0x00000500
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CS6AWCR_D: .long 0x00000500
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CS6BWCR_D: .long 0x00000500
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SDCR_D1: .long 0x00000011
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RTCSR_D: .long 0xA55A0010
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RTCNT_D: .long 0xA55A001F
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RTCOR_D: .long 0xA55A001F
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SDMR3_D: .long 0x0000
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SDCR_D2: .long 0x00000811
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#define PFC_BASE 0xA4050100
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PCCR_A: .long PFC_BASE + 0x04
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PDCR_A: .long PFC_BASE + 0x06
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PECR_A: .long PFC_BASE + 0x08
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PGCR_A: .long PFC_BASE + 0x0C
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PHCR_A: .long PFC_BASE + 0x0E
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PPCR_A: .long PFC_BASE + 0x18
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PTCR_A: .long PFC_BASE + 0x1E
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PVCR_A: .long PFC_BASE + 0x22
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PSELA_A: .long PFC_BASE + 0x24
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PCCR_D: .long 0x0000
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PDCR_D: .long 0x0000
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PECR_D: .long 0x0000
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PGCR_D: .long 0x0000
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PHCR_D: .long 0x0000
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PPCR_D: .long 0x00AA
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PTCR_D: .long 0x0280
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PVCR_D: .long 0x0000
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PSELA_D: .long 0x0000
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CCR_A: .long 0xFFFFFFEC
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!CCR_D: .long 0x0000000D
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CCR_D: .long 0x0000000B
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LED_A: .long 0xB6800000
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LED_D: .long 0xFF
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