u-boot/arch/x86/include/asm/arch-queensbay/tnc.h

/*
 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _X86_ARCH_TNC_H_
#define _X86_ARCH_TNC_H_

#include <pci.h>

#define TNC_LPC		PCI_BDF(0, 31, 0)

#endif /* _X86_ARCH_TNC_H_ */
x86: crownbay: Add SPI flash support The Crown Bay board has an SST25VF016B flash connected to the Tunnel Creek processor SPI controller used as the BIOS media where U-Boot is stored. Enable this flash support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2014-12-17 07:50:44 +00:00			`/*`
			`* Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>`
			`*`
			`* SPDX-License-Identifier: GPL-2.0+`
			`*/`

			`#ifndef _X86_ARCH_TNC_H_`
			`#define _X86_ARCH_TNC_H_`

			`#include <pci.h>`

x86: queensbay: Avoid using PCH prefix The prefix PCH was taken from ivybridge port. However Queensbay platform official document does not mention PCH. It is composed of TunnelCreek processor and Topcliff IOH chipset. For accuracy, avoid using PCH prefix in the macro. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2015-04-13 11:03:42 +00:00			`#define TNC_LPC PCI_BDF(0, 31, 0)`
x86: crownbay: Add SPI flash support The Crown Bay board has an SST25VF016B flash connected to the Tunnel Creek processor SPI controller used as the BIOS media where U-Boot is stored. Enable this flash support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2014-12-17 07:50:44 +00:00
			`#endif /* _X86_ARCH_TNC_H_ */`