u-boot/arch/m68k/dts/mcf5441x.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2018 Angelo Dureghello <angelo@sysam.it>
 */

/ {
	compatible = "fsl,mcf5441x";

	aliases {
		serial0 = &uart0;
		spi0 = &dspi0;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;

		uart0: uart@fc060000 {
			compatible = "fsl,mcf-uart";
			reg = <0xfc060000 0x40>;
			status = "disabled";
		};

		uart1: uart@fc064000 {
			compatible = "fsl,mcf-uart";
			reg = <0xfc064000 0x40>;
			status = "disabled";
		};

		uart2: uart@fc068000 {
			compatible = "fsl,mcf-uart";
			reg = <0xfc068000 0x40>;
			status = "disabled";
		};

		uart3: uart@fc06c000 {
			compatible = "fsl,mcf-uart";
			reg = <0xfc06c000 0x40>;
			status = "disabled";
		};

		dspi0: dspi@fc05c000 {
			compatible = "fsl,mcf-dspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xfc05c000 0x100>;
			spi-max-frequency = <50000000>;
			num-cs = <4>;
			spi-mode = <0>;
			status = "disabled";
		};

		dspi1: dspi@fc03c000 {
			compatible = "fsl,mcf-dspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xfc03c000 0x100>;
			spi-max-frequency = <50000000>;
			num-cs = <4>;
			spi-mode = <0>;
			status = "disabled";
		};

		dspi2: dspi@ec038000 {
			compatible = "fsl,mcf-dspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xec038000 0x100>;
			spi-max-frequency = <50000000>;
			num-cs = <4>;
			spi-mode = <0>;
			status = "disabled";
		};

		dspi3: dspi@ec03c000 {
			compatible = "fsl,mcf-dspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0xec03c00 0x100>;
			spi-max-frequency = <50000000>;
			num-cs = <4>;
			spi-mode = <0>;
			status = "disabled";
		};
	};
};