2018-08-27 10:27:11 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*/
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#ifndef _ASM_ARCH_HARDWARE_H_
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#define _ASM_ARCH_HARDWARE_H_
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2022-07-15 15:25:27 +00:00
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#ifdef CONFIG_SOC_K3_AM654
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2018-08-27 10:27:11 +00:00
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#include "am6_hardware.h"
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#endif
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2019-06-13 04:59:43 +00:00
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#ifdef CONFIG_SOC_K3_J721E
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#include "j721e_hardware.h"
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#endif
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2019-09-27 08:02:11 +00:00
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2022-01-25 15:26:31 +00:00
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#ifdef CONFIG_SOC_K3_J721S2
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#include "j721s2_hardware.h"
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#endif
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2021-04-23 16:27:33 +00:00
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#ifdef CONFIG_SOC_K3_AM642
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#include "am64_hardware.h"
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#endif
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arm: mach-k3: Introduce the basic files to support AM62
The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC
architecture platform, providing ultra-low-power modes, dual display,
multi-sensor edge compute, security and other BOM-saving integration.
The AM62 SoC targets broad market to enable applications such as
Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building
Automation, Appliances and more.
Some highlights of this SoC are:
* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
Pin-to-pin compatible options for single and quad core are available.
* Cortex-M4F for general-purpose or safety usage.
* Dual display support, providing 24-bit RBG parallel interface and
OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
resolution.
* Selectable GPUsupport, up to 8GFLOPS, providing better user experience
in 3D graphic display case and Android.
* PRU(Programmable Realtime Unit) support for customized programmable
interfaces/IOs.
* Integrated Giga-bit Ethernet switch supporting up to a total of two
external ports (TSN capable).
* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
* Dedicated Centralized System Controller for Security, Power, and
Resource Management.
* Multiple low power modes support, ex: Deep sleep,Standby, MCU-only,
enabling battery powered system design.
AM625 is the first device of the family. Add DT bindings for the same.
More details can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-25 08:08:42 +00:00
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#ifdef CONFIG_SOC_K3_AM625
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#include "am62_hardware.h"
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#endif
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2022-11-04 00:13:55 +00:00
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#ifdef CONFIG_SOC_K3_AM62A7
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#include "am62a_hardware.h"
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#endif
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2019-09-27 08:02:11 +00:00
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/* Assuming these addresses and definitions stay common across K3 devices */
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2022-10-07 19:22:05 +00:00
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#define CTRLMMR_WKUP_JTAG_ID (WKUP_CTRL_MMR0_BASE + 0x14)
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2019-09-27 08:02:11 +00:00
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#define JTAG_ID_VARIANT_SHIFT 28
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#define JTAG_ID_VARIANT_MASK (0xf << 28)
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#define JTAG_ID_PARTNO_SHIFT 12
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2020-04-17 08:13:53 +00:00
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#define JTAG_ID_PARTNO_MASK (0xffff << 12)
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2022-07-15 16:34:32 +00:00
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#define K3_SEC_MGR_SYS_STATUS 0x44234100
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#define SYS_STATUS_DEV_TYPE_SHIFT 0
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#define SYS_STATUS_DEV_TYPE_MASK (0xf)
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#define SYS_STATUS_DEV_TYPE_GP 0x3
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#define SYS_STATUS_DEV_TYPE_TEST 0x5
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#define SYS_STATUS_DEV_TYPE_EMU 0x9
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#define SYS_STATUS_DEV_TYPE_HS 0xa
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#define SYS_STATUS_SUB_TYPE_SHIFT 8
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#define SYS_STATUS_SUB_TYPE_MASK (0xf << 8)
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#define SYS_STATUS_SUB_TYPE_VAL_FS 0xa
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2019-09-27 08:02:11 +00:00
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2022-10-07 19:22:05 +00:00
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/*
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* The CTRL_MMR0 memory space is divided into several equally-spaced
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* partitions, so defining the partition size allows us to determine
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* register addresses common to those partitions.
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*/
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#define CTRL_MMR0_PARTITION_SIZE 0x4000
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/*
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* CTRL_MMR0, WKUP_CTRL_MMR0, and MCU_CTRL_MMR0 lock/kick-mechanism
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* shared register definitions. The same registers are also used for
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* PADCFG_MMR lock/kick-mechanism.
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*/
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#define CTRLMMR_LOCK_KICK0 0x1008
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#define CTRLMMR_LOCK_KICK0_UNLOCK_VAL 0x68ef3490
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#define CTRLMMR_LOCK_KICK1 0x100c
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#define CTRLMMR_LOCK_KICK1_UNLOCK_VAL 0xd172bc5a
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2020-08-05 17:14:22 +00:00
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#define K3_ROM_BOOT_HEADER_MAGIC "EXTBOOT"
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struct rom_extended_boot_data {
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char header[8];
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u32 num_components;
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};
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2018-08-27 10:27:11 +00:00
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#endif /* _ASM_ARCH_HARDWARE_H_ */
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