2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2012-10-25 19:49:25 +00:00
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/*
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* Copyright (C) 2012 Samsung Electronics
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* R. Chandrasekar <rcsekar@samsung.com>
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*/
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#ifndef __I2S_REGS_H__
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#define __I2S_REGS_H__
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2013-09-11 11:08:49 +00:00
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#define CON_RESET (1 << 31)
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2012-10-25 19:49:25 +00:00
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#define CON_TXFIFO_FULL (1 << 8)
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#define CON_TXCH_PAUSE (1 << 4)
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#define CON_ACTIVE (1 << 0)
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2013-09-11 11:08:49 +00:00
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#define MOD_OP_CLK (3 << 30)
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2012-10-25 19:49:25 +00:00
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#define MOD_BLCP_SHIFT 24
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#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
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#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
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#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
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#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
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#define MOD_BLC_16BIT (0 << 13)
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#define MOD_BLC_8BIT (1 << 13)
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#define MOD_BLC_24BIT (2 << 13)
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#define MOD_BLC_MASK (3 << 13)
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#define MOD_SLAVE (1 << 11)
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2013-09-11 11:08:49 +00:00
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#define MOD_RCLKSRC (0 << 10)
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2012-10-25 19:49:25 +00:00
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#define MOD_MASK (3 << 8)
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#define MOD_LR_LLOW (0 << 7)
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#define MOD_LR_RLOW (1 << 7)
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#define MOD_SDF_IIS (0 << 5)
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#define MOD_SDF_MSB (1 << 5)
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#define MOD_SDF_LSB (2 << 5)
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#define MOD_SDF_MASK (3 << 5)
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#define MOD_RCLK_256FS (0 << 3)
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#define MOD_RCLK_512FS (1 << 3)
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#define MOD_RCLK_384FS (2 << 3)
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#define MOD_RCLK_768FS (3 << 3)
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#define MOD_RCLK_MASK (3 << 3)
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#define MOD_BCLK_32FS (0 << 1)
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#define MOD_BCLK_48FS (1 << 1)
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#define MOD_BCLK_16FS (2 << 1)
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#define MOD_BCLK_24FS (3 << 1)
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#define MOD_BCLK_MASK (3 << 1)
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#define MOD_CDCLKCON (1 << 12)
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#define FIC_TXFLUSH (1 << 15)
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#define FIC_RXFLUSH (1 << 7)
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2013-09-11 11:08:49 +00:00
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#define PSREN (1 << 15)
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#define PSVAL (3 << 8)
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2012-10-25 19:49:25 +00:00
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#endif /* __I2S_REGS_H__ */
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