2018-08-27 10:29:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board specific initialization for AM654 EVM
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*
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* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
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* Lokesh Vutla <lokeshvutla@ti.com>
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*
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*/
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#include <common.h>
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2019-06-04 23:08:26 +00:00
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#include <dm.h>
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2020-05-10 17:40:01 +00:00
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#include <fdt_support.h>
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#include <image.h>
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2019-11-14 19:57:45 +00:00
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#include <init.h>
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2020-05-10 17:39:56 +00:00
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#include <net.h>
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2019-06-04 23:08:26 +00:00
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/hardware.h>
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2020-10-31 03:38:53 +00:00
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#include <asm/global_data.h>
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2019-06-04 23:08:26 +00:00
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#include <asm/gpio.h>
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2018-08-27 10:29:06 +00:00
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#include <asm/io.h>
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2019-06-04 23:08:26 +00:00
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#include <asm/omap_common.h>
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2019-08-01 15:46:51 +00:00
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#include <env.h>
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2018-08-27 10:29:06 +00:00
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#include <spl.h>
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2019-03-08 06:17:35 +00:00
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#include <asm/arch/sys_proto.h>
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2018-08-27 10:29:06 +00:00
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2019-06-04 23:08:26 +00:00
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#include "../common/board_detect.h"
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#define board_is_am65x_base_board() board_ti_is("AM6-COMPROCEVM")
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/* Daughter card presence detection signals */
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enum {
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AM65X_EVM_APP_BRD_DET,
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AM65X_EVM_LCD_BRD_DET,
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AM65X_EVM_SERDES_BRD_DET,
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AM65X_EVM_HDMI_GPMC_BRD_DET,
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AM65X_EVM_BRD_DET_COUNT,
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};
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/* Max number of MAC addresses that are parsed/processed per daughter card */
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#define DAUGHTER_CARD_NO_OF_MAC_ADDR 8
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2020-11-20 15:48:53 +00:00
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/* Regiter that controls the SERDES0 lane and clock assignment */
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#define CTRLMMR_SERDES0_CTRL 0x00104080
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#define PCIE_LANE0 0x1
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2018-08-27 10:29:06 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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#ifdef CONFIG_PHYS_64BIT
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gd->ram_size = 0x100000000;
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#else
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gd->ram_size = 0x80000000;
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#endif
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return 0;
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}
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2022-09-09 15:32:40 +00:00
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phys_size_t board_get_usable_ram_top(phys_size_t total_size)
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2018-08-27 10:29:06 +00:00
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{
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#ifdef CONFIG_PHYS_64BIT
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/* Limit RAM used by U-Boot to the DDR low region */
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if (gd->ram_top > 0x100000000)
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return 0x100000000;
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#endif
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return gd->ram_top;
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}
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int dram_init_banksize(void)
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{
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/* Bank 0 declares the memory available in the DDR low region */
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2022-11-16 18:10:37 +00:00
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gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
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2018-08-27 10:29:06 +00:00
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gd->bd->bi_dram[0].size = 0x80000000;
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2020-05-18 05:57:22 +00:00
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gd->ram_size = 0x80000000;
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2018-08-27 10:29:06 +00:00
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#ifdef CONFIG_PHYS_64BIT
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/* Bank 1 declares the memory available in the DDR high region */
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2022-11-16 18:10:37 +00:00
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gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1;
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2018-08-27 10:29:06 +00:00
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gd->bd->bi_dram[1].size = 0x80000000;
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2020-05-18 05:57:22 +00:00
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gd->ram_size = 0x100000000;
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2018-08-27 10:29:06 +00:00
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#endif
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return 0;
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}
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2018-08-27 10:29:08 +00:00
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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#ifdef CONFIG_TARGET_AM654_A53_EVM
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if (!strcmp(name, "k3-am654-base-board"))
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return 0;
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#endif
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return -1;
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}
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#endif
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2019-03-08 06:17:35 +00:00
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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2020-06-26 06:13:33 +00:00
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int ft_board_setup(void *blob, struct bd_info *bd)
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2019-03-08 06:17:35 +00:00
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{
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int ret;
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2020-07-29 18:41:12 +00:00
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ret = fdt_fixup_msmc_ram(blob, "/bus@100000", "sram@70000000");
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if (ret < 0)
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ret = fdt_fixup_msmc_ram(blob, "/interconnect@100000",
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"sram@70000000");
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2019-09-17 21:15:40 +00:00
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if (ret) {
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2019-03-08 06:17:35 +00:00
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printf("%s: fixing up msmc ram failed %d\n", __func__, ret);
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2019-09-17 21:15:40 +00:00
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return ret;
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}
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return 0;
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2019-03-08 06:17:35 +00:00
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}
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#endif
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2019-06-04 23:08:26 +00:00
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2022-02-15 06:47:55 +00:00
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#ifdef CONFIG_TI_I2C_BOARD_DETECT
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2019-06-04 23:08:26 +00:00
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int do_board_detect(void)
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{
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int ret;
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ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS);
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if (ret)
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pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
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CONFIG_EEPROM_CHIP_ADDRESS, ret);
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return ret;
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}
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2019-09-27 08:02:12 +00:00
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int checkboard(void)
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{
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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if (do_board_detect())
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/* EEPROM not populated */
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printf("Board: %s rev %s\n", "AM6-COMPROCEVM", "E3");
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else
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printf("Board: %s rev %s\n", ep->name, ep->version);
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return 0;
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}
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2019-06-04 23:08:26 +00:00
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static void setup_board_eeprom_env(void)
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{
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char *name = "am65x";
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if (do_board_detect())
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goto invalid_eeprom;
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if (board_is_am65x_base_board())
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name = "am65x";
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else
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printf("Unidentified board claims %s in eeprom header\n",
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board_ti_get_name());
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invalid_eeprom:
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set_board_info_env_am6(name);
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}
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static int init_daughtercard_det_gpio(char *gpio_name, struct gpio_desc *desc)
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{
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int ret;
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memset(desc, 0, sizeof(*desc));
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ret = dm_gpio_lookup_name(gpio_name, desc);
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if (ret < 0)
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return ret;
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/* Request GPIO, simply re-using the name as label */
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ret = dm_gpio_request(desc, gpio_name);
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if (ret < 0)
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return ret;
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return dm_gpio_set_dir_flags(desc, GPIOD_IS_IN);
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}
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static int probe_daughtercards(void)
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{
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struct ti_am6_eeprom ep;
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struct gpio_desc board_det_gpios[AM65X_EVM_BRD_DET_COUNT];
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char mac_addr[DAUGHTER_CARD_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
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u8 mac_addr_cnt;
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char name_overlays[1024] = { 0 };
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int i, j;
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int ret;
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/*
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* Daughter card presence detection signal name to GPIO (via I2C I/O
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* expander @ address 0x38) name and EEPROM I2C address mapping.
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*/
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const struct {
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char *gpio_name;
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u8 i2c_addr;
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} slot_map[AM65X_EVM_BRD_DET_COUNT] = {
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{ "gpio@38_0", 0x52, }, /* AM65X_EVM_APP_BRD_DET */
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{ "gpio@38_1", 0x55, }, /* AM65X_EVM_LCD_BRD_DET */
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{ "gpio@38_2", 0x54, }, /* AM65X_EVM_SERDES_BRD_DET */
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{ "gpio@38_3", 0x53, }, /* AM65X_EVM_HDMI_GPMC_BRD_DET */
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};
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/* Declaration of daughtercards to probe */
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const struct {
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u8 slot_index; /* Slot the card is installed */
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char *card_name; /* EEPROM-programmed card name */
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char *dtbo_name; /* Device tree overlay to apply */
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u8 eth_offset; /* ethXaddr MAC address index offset */
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} cards[] = {
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{
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AM65X_EVM_APP_BRD_DET,
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"AM6-GPAPPEVM",
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"k3-am654-gp.dtbo",
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0,
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},
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{
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AM65X_EVM_APP_BRD_DET,
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"AM6-IDKAPPEVM",
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"k3-am654-idk.dtbo",
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3,
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},
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{
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AM65X_EVM_SERDES_BRD_DET,
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"SER-PCIE2LEVM",
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"k3-am654-pcie-usb2.dtbo",
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0,
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},
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{
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AM65X_EVM_SERDES_BRD_DET,
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"SER-PCIEUSBEVM",
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"k3-am654-pcie-usb3.dtbo",
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0,
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},
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{
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AM65X_EVM_LCD_BRD_DET,
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"OLDI-LCD1EVM",
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"k3-am654-evm-oldi-lcd1evm.dtbo",
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0,
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},
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};
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/*
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* Initialize GPIO used for daughtercard slot presence detection and
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* keep the resulting handles in local array for easier access.
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*/
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for (i = 0; i < AM65X_EVM_BRD_DET_COUNT; i++) {
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ret = init_daughtercard_det_gpio(slot_map[i].gpio_name,
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&board_det_gpios[i]);
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if (ret < 0)
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return ret;
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}
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for (i = 0; i < ARRAY_SIZE(cards); i++) {
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/* Obtain card-specific slot index and associated I2C address */
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u8 slot_index = cards[i].slot_index;
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u8 i2c_addr = slot_map[slot_index].i2c_addr;
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/*
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* The presence detection signal is active-low, hence skip
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* over this card slot if anything other than 0 is returned.
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*/
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ret = dm_gpio_get_value(&board_det_gpios[slot_index]);
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if (ret < 0)
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return ret;
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else if (ret)
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continue;
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/* Get and parse the daughter card EEPROM record */
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ret = ti_i2c_eeprom_am6_get(CONFIG_EEPROM_BUS_ADDRESS, i2c_addr,
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&ep,
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(char **)mac_addr,
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DAUGHTER_CARD_NO_OF_MAC_ADDR,
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&mac_addr_cnt);
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if (ret) {
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pr_err("Reading daughtercard EEPROM at 0x%02x failed %d\n",
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i2c_addr, ret);
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/*
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* Even this is pretty serious let's just skip over
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* this particular daughtercard, rather than ending
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* the probing process altogether.
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*/
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continue;
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}
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/* Only process the parsed data if we found a match */
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if (strncmp(ep.name, cards[i].card_name, sizeof(ep.name)))
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continue;
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2019-09-27 08:02:12 +00:00
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printf("Detected: %s rev %s\n", ep.name, ep.version);
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2019-06-04 23:08:26 +00:00
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/*
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* Populate any MAC addresses from daughtercard into the U-Boot
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* environment, starting with a card-specific offset so we can
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* have multiple cards contribute to the MAC pool in a well-
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* defined manner.
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*/
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for (j = 0; j < mac_addr_cnt; j++) {
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if (!is_valid_ethaddr((u8 *)mac_addr[j]))
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continue;
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eth_env_set_enetaddr_by_index("eth",
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cards[i].eth_offset + j,
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(uchar *)mac_addr[j]);
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}
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2020-11-20 15:48:53 +00:00
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/*
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* It has been observed that setting SERDES0 lane mux to USB prevents USB
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* 2.0 operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is
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* used in USB 2.0 only mode solves this issue. For USB3.0+2.0 operation
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* this issue is not present.
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*
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* Implement this workaround by writing 1 to LANE_FUNC_SEL field in
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* CTRLMMR_SERDES0_CTRL register.
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*/
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if (!strncmp(ep.name, "SER-PCIE2LEVM", sizeof(ep.name)))
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writel(PCIE_LANE0, CTRLMMR_SERDES0_CTRL);
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2019-06-04 23:08:26 +00:00
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/* Skip if no overlays are to be added */
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if (!strlen(cards[i].dtbo_name))
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continue;
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/*
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* Make sure we are not running out of buffer space by checking
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* if we can fit the new overlay, a trailing space to be used
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* as a separator, plus the terminating zero.
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*/
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if (strlen(name_overlays) + strlen(cards[i].dtbo_name) + 2 >
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sizeof(name_overlays))
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return -ENOMEM;
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/* Append to our list of overlays */
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strcat(name_overlays, cards[i].dtbo_name);
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strcat(name_overlays, " ");
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}
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|
|
/* Apply device tree overlay(s) to the U-Boot environment, if any */
|
|
|
|
if (strlen(name_overlays))
|
|
|
|
return env_set("name_overlays", name_overlays);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2022-02-15 06:47:55 +00:00
|
|
|
#endif
|
2019-06-04 23:08:26 +00:00
|
|
|
|
|
|
|
int board_late_init(void)
|
|
|
|
{
|
2022-02-15 06:47:55 +00:00
|
|
|
if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
|
|
|
|
struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
|
2019-06-04 23:08:26 +00:00
|
|
|
|
2022-02-15 06:47:55 +00:00
|
|
|
setup_board_eeprom_env();
|
2019-06-04 23:08:26 +00:00
|
|
|
|
2022-02-15 06:47:55 +00:00
|
|
|
/*
|
|
|
|
* The first MAC address for ethernet a.k.a. ethernet0 comes from
|
|
|
|
* efuse populated via the am654 gigabit eth switch subsystem driver.
|
|
|
|
* All the other ones are populated via EEPROM, hence continue with
|
|
|
|
* an index of 1.
|
|
|
|
*/
|
|
|
|
board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt);
|
2019-06-04 23:08:26 +00:00
|
|
|
|
2022-02-15 06:47:55 +00:00
|
|
|
/* Check for and probe any plugged-in daughtercards */
|
|
|
|
probe_daughtercards();
|
|
|
|
}
|
2019-06-04 23:08:26 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|