2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2011-04-14 12:09:41 +00:00
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/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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2012-01-11 12:42:27 +00:00
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#include <asm/arch/clock.h>
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#include <asm/arch/funcmux.h>
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2011-10-31 06:51:35 +00:00
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#include <asm/arch/pinmux.h>
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2012-09-19 22:50:56 +00:00
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#include <asm/arch/tegra.h>
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2011-10-31 06:51:36 +00:00
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#include <asm/gpio.h>
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2011-09-21 12:40:07 +00:00
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2017-01-10 04:32:07 +00:00
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#ifdef CONFIG_MMC_SDHCI_TEGRA
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2011-10-31 06:51:35 +00:00
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/*
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* Routine: pin_mux_mmc
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* Description: setup the pin muxes/tristate values for the SDMMC(s)
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*/
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2013-02-21 12:31:30 +00:00
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void pin_mux_mmc(void)
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2011-10-31 06:51:35 +00:00
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{
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2012-01-11 12:42:27 +00:00
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funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
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funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT);
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2011-10-31 06:51:35 +00:00
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/* For power GPIO PI6 */
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2014-03-21 18:28:58 +00:00
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pinmux_tristate_disable(PMUX_PINGRP_ATA);
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2011-10-31 06:51:35 +00:00
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/* For CD GPIO PH2 */
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2014-03-21 18:28:58 +00:00
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pinmux_tristate_disable(PMUX_PINGRP_ATD);
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2011-10-31 06:51:35 +00:00
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/* For power GPIO PT3 */
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2014-03-21 18:28:58 +00:00
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pinmux_tristate_disable(PMUX_PINGRP_DTB);
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2011-10-31 06:51:35 +00:00
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/* For CD GPIO PI5 */
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2014-03-21 18:28:58 +00:00
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pinmux_tristate_disable(PMUX_PINGRP_ATC);
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2011-10-31 06:51:35 +00:00
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}
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2011-09-21 12:40:07 +00:00
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#endif
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2012-10-12 09:45:48 +00:00
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void pin_mux_usb(void)
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{
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funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
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2014-03-21 18:28:58 +00:00
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pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
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pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
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2012-10-12 09:45:48 +00:00
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/* USB2 PHY reset GPIO */
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2014-03-21 18:28:58 +00:00
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pinmux_tristate_disable(PMUX_PINGRP_UAC);
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2012-10-12 09:45:48 +00:00
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}
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2013-06-18 15:46:51 +00:00
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void pin_mux_display(void)
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{
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2014-03-21 18:28:58 +00:00
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pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
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pinmux_tristate_disable(PMUX_PINGRP_SDC);
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2013-06-18 15:46:51 +00:00
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}
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