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287 lines
8.4 KiB
C
287 lines
8.4 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018-2022 Marvell International Ltd.
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*
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* IPD helper functions.
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*/
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#include <errno.h>
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#include <log.h>
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#include <time.h>
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#include <linux/delay.h>
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#include <mach/cvmx-regs.h>
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#include <mach/cvmx-csr.h>
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#include <mach/cvmx-bootmem.h>
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#include <mach/octeon-model.h>
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#include <mach/cvmx-fuse.h>
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#include <mach/octeon-feature.h>
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#include <mach/cvmx-qlm.h>
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#include <mach/octeon_qlm.h>
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#include <mach/cvmx-pcie.h>
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#include <mach/cvmx-coremask.h>
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#include <mach/cvmx-range.h>
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#include <mach/cvmx-global-resources.h>
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#include <mach/cvmx-agl-defs.h>
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#include <mach/cvmx-bgxx-defs.h>
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#include <mach/cvmx-ciu-defs.h>
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#include <mach/cvmx-gmxx-defs.h>
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#include <mach/cvmx-gserx-defs.h>
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#include <mach/cvmx-ilk-defs.h>
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#include <mach/cvmx-ipd-defs.h>
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#include <mach/cvmx-pcsx-defs.h>
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#include <mach/cvmx-pcsxx-defs.h>
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#include <mach/cvmx-pki-defs.h>
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#include <mach/cvmx-pko-defs.h>
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#include <mach/cvmx-xcv-defs.h>
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#include <mach/cvmx-hwpko.h>
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#include <mach/cvmx-ilk.h>
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#include <mach/cvmx-ipd.h>
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#include <mach/cvmx-pki.h>
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#include <mach/cvmx-pko3.h>
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#include <mach/cvmx-pko3-queue.h>
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#include <mach/cvmx-pko3-resources.h>
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#include <mach/cvmx-pip.h>
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#include <mach/cvmx-helper.h>
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#include <mach/cvmx-helper-board.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-bgx.h>
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#include <mach/cvmx-helper-cfg.h>
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#include <mach/cvmx-helper-util.h>
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#include <mach/cvmx-helper-pki.h>
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/** It allocate pools for packet and wqe pools
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* and sets up the FPA hardware
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*/
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int __cvmx_helper_ipd_setup_fpa_pools(void)
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{
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cvmx_fpa_global_initialize();
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if (cvmx_ipd_cfg.packet_pool.buffer_count == 0)
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return 0;
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__cvmx_helper_initialize_fpa_pool(cvmx_ipd_cfg.packet_pool.pool_num,
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cvmx_ipd_cfg.packet_pool.buffer_size,
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cvmx_ipd_cfg.packet_pool.buffer_count,
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"Packet Buffers");
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if (cvmx_ipd_cfg.wqe_pool.buffer_count == 0)
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return 0;
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__cvmx_helper_initialize_fpa_pool(cvmx_ipd_cfg.wqe_pool.pool_num,
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cvmx_ipd_cfg.wqe_pool.buffer_size,
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cvmx_ipd_cfg.wqe_pool.buffer_count,
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"WQE Buffers");
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return 0;
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}
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/**
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* @INTERNAL
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* Setup global setting for IPD/PIP not related to a specific
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* interface or port. This must be called before IPD is enabled.
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*
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* @return Zero on success, negative on failure.
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*/
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int __cvmx_helper_ipd_global_setup(void)
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{
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/* Setup the packet and wqe pools*/
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__cvmx_helper_ipd_setup_fpa_pools();
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/* Setup the global packet input options */
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cvmx_ipd_config(cvmx_ipd_cfg.packet_pool.buffer_size / 8,
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cvmx_ipd_cfg.first_mbuf_skip / 8,
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cvmx_ipd_cfg.not_first_mbuf_skip / 8,
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/* The +8 is to account for the next ptr */
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(cvmx_ipd_cfg.first_mbuf_skip + 8) / 128,
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/* The +8 is to account for the next ptr */
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(cvmx_ipd_cfg.not_first_mbuf_skip + 8) / 128,
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cvmx_ipd_cfg.wqe_pool.pool_num,
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(cvmx_ipd_mode_t)(cvmx_ipd_cfg.cache_mode), 1);
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return 0;
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}
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/**
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* Enable or disable FCS stripping for all the ports on an interface.
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*
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* @param xiface
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* @param nports number of ports
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* @param has_fcs 0 for disable and !0 for enable
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*/
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static int cvmx_helper_fcs_op(int xiface, int nports, int has_fcs)
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{
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u64 port_bit;
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int index;
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int pknd;
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union cvmx_pip_sub_pkind_fcsx pkind_fcsx;
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union cvmx_pip_prt_cfgx port_cfg;
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struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface);
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if (!octeon_has_feature(OCTEON_FEATURE_PKND))
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return 0;
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if (octeon_has_feature(OCTEON_FEATURE_PKI)) {
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cvmx_helper_pki_set_fcs_op(xi.node, xi.interface, nports,
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has_fcs);
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return 0;
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}
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port_bit = 0;
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for (index = 0; index < nports; index++)
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port_bit |= ((u64)1 << cvmx_helper_get_pknd(xiface, index));
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pkind_fcsx.u64 = csr_rd(CVMX_PIP_SUB_PKIND_FCSX(0));
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if (has_fcs)
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pkind_fcsx.s.port_bit |= port_bit;
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else
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pkind_fcsx.s.port_bit &= ~port_bit;
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csr_wr(CVMX_PIP_SUB_PKIND_FCSX(0), pkind_fcsx.u64);
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for (pknd = 0; pknd < 64; pknd++) {
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if ((1ull << pknd) & port_bit) {
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port_cfg.u64 = csr_rd(CVMX_PIP_PRT_CFGX(pknd));
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port_cfg.s.crc_en = (has_fcs) ? 1 : 0;
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csr_wr(CVMX_PIP_PRT_CFGX(pknd), port_cfg.u64);
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}
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}
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return 0;
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}
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/**
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* @INTERNAL
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* Configure the IPD/PIP tagging and QoS options for a specific
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* port. This function determines the POW work queue entry
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* contents for a port. The setup performed here is controlled by
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* the defines in executive-config.h.
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*
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* @param ipd_port Port/Port kind to configure. This follows the IPD numbering,
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* not the per interface numbering
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*
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* @return Zero on success, negative on failure
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*/
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static int __cvmx_helper_ipd_port_setup(int ipd_port)
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{
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union cvmx_pip_prt_cfgx port_config;
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union cvmx_pip_prt_tagx tag_config;
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if (octeon_has_feature(OCTEON_FEATURE_PKND)) {
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int xiface, index, pknd;
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union cvmx_pip_prt_cfgbx prt_cfgbx;
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xiface = cvmx_helper_get_interface_num(ipd_port);
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index = cvmx_helper_get_interface_index_num(ipd_port);
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pknd = cvmx_helper_get_pknd(xiface, index);
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port_config.u64 = csr_rd(CVMX_PIP_PRT_CFGX(pknd));
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tag_config.u64 = csr_rd(CVMX_PIP_PRT_TAGX(pknd));
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port_config.s.qos = pknd & 0x7;
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/* Default BPID to use for packets on this port-kind */
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prt_cfgbx.u64 = csr_rd(CVMX_PIP_PRT_CFGBX(pknd));
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prt_cfgbx.s.bpid = pknd;
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csr_wr(CVMX_PIP_PRT_CFGBX(pknd), prt_cfgbx.u64);
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} else {
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port_config.u64 = csr_rd(CVMX_PIP_PRT_CFGX(ipd_port));
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tag_config.u64 = csr_rd(CVMX_PIP_PRT_TAGX(ipd_port));
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/* Have each port go to a different POW queue */
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port_config.s.qos = ipd_port & 0x7;
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}
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/* Process the headers and place the IP header in the work queue */
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port_config.s.mode =
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(cvmx_pip_port_parse_mode_t)cvmx_ipd_cfg.port_config.parse_mode;
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tag_config.s.ip6_src_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv6_src_ip;
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tag_config.s.ip6_dst_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv6_dst_ip;
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tag_config.s.ip6_sprt_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv6_src_port;
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tag_config.s.ip6_dprt_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv6_dst_port;
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tag_config.s.ip6_nxth_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv6_next_header;
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tag_config.s.ip4_src_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv4_src_ip;
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tag_config.s.ip4_dst_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv4_dst_ip;
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tag_config.s.ip4_sprt_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv4_src_port;
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tag_config.s.ip4_dprt_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv4_dst_port;
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tag_config.s.ip4_pctl_flag =
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cvmx_ipd_cfg.port_config.tag_fields.ipv4_protocol;
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tag_config.s.inc_prt_flag =
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cvmx_ipd_cfg.port_config.tag_fields.input_port;
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tag_config.s.tcp6_tag_type =
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(cvmx_pow_tag_type_t)cvmx_ipd_cfg.port_config.tag_type;
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tag_config.s.tcp4_tag_type =
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(cvmx_pow_tag_type_t)cvmx_ipd_cfg.port_config.tag_type;
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tag_config.s.ip6_tag_type =
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(cvmx_pow_tag_type_t)cvmx_ipd_cfg.port_config.tag_type;
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tag_config.s.ip4_tag_type =
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(cvmx_pow_tag_type_t)cvmx_ipd_cfg.port_config.tag_type;
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tag_config.s.non_tag_type =
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(cvmx_pow_tag_type_t)cvmx_ipd_cfg.port_config.tag_type;
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/* Put all packets in group 0. Other groups can be used by the app */
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tag_config.s.grp = 0;
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cvmx_pip_config_port(ipd_port, port_config, tag_config);
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/* Give the user a chance to override our setting for each port */
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if (cvmx_override_ipd_port_setup)
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cvmx_override_ipd_port_setup(ipd_port);
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return 0;
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}
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/**
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* @INTERNAL
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* Setup the IPD/PIP for the ports on an interface. Packet
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* classification and tagging are set for every port on the
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* interface. The number of ports on the interface must already
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* have been probed.
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*
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* @param xiface to setup IPD/PIP for
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*
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* @return Zero on success, negative on failure
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*/
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int __cvmx_helper_ipd_setup_interface(int xiface)
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{
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cvmx_helper_interface_mode_t mode;
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int num_ports = cvmx_helper_ports_on_interface(xiface);
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struct cvmx_xiface xi = cvmx_helper_xiface_to_node_interface(xiface);
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int ipd_port = cvmx_helper_get_ipd_port(xiface, 0);
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int delta;
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if (num_ports == CVMX_HELPER_CFG_INVALID_VALUE)
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return 0;
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delta = 1;
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if (octeon_has_feature(OCTEON_FEATURE_PKND)) {
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if (xi.interface < CVMX_HELPER_MAX_GMX)
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delta = 16;
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}
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while (num_ports--) {
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if (!cvmx_helper_is_port_valid(xiface, num_ports))
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continue;
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if (octeon_has_feature(OCTEON_FEATURE_PKI))
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__cvmx_helper_pki_port_setup(xi.node, ipd_port);
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else
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__cvmx_helper_ipd_port_setup(ipd_port);
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ipd_port += delta;
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}
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/* FCS settings */
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cvmx_helper_fcs_op(xiface, cvmx_helper_ports_on_interface(xiface),
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__cvmx_helper_get_has_fcs(xiface));
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mode = cvmx_helper_interface_get_mode(xiface);
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if (mode == CVMX_HELPER_INTERFACE_MODE_LOOP)
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__cvmx_helper_loop_enable(xiface);
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return 0;
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}
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