2012-09-13 03:18:20 +00:00
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/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX6Q SabreSD board.
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*
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2013-07-08 07:37:19 +00:00
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* SPDX-License-Identifier: GPL-2.0+
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2012-09-13 03:18:20 +00:00
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*/
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2012-09-24 08:09:32 +00:00
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#ifndef __MX6QSABRESD_CONFIG_H
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#define __MX6QSABRESD_CONFIG_H
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2012-09-13 03:18:20 +00:00
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2014-11-12 22:27:44 +00:00
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#ifdef CONFIG_SPL
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#include "imx6_spl.h"
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#endif
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2012-09-13 03:18:20 +00:00
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#define CONFIG_MACH_TYPE 3980
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2012-09-24 08:09:32 +00:00
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#define CONFIG_MXC_UART_BASE UART1_BASE
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2012-09-26 11:37:01 +00:00
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#define CONFIG_CONSOLE_DEV "ttymxc0"
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2012-10-02 09:22:10 +00:00
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#define CONFIG_MMCROOT "/dev/mmcblk1p2"
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2013-09-18 01:55:59 +00:00
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#if defined(CONFIG_MX6Q)
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2013-01-10 09:45:09 +00:00
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#define CONFIG_DEFAULT_FDT_FILE "imx6q-sabresd.dtb"
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2013-09-18 01:55:59 +00:00
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#elif defined(CONFIG_MX6DL)
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#define CONFIG_DEFAULT_FDT_FILE "imx6dl-sabresd.dtb"
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#endif
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2012-09-24 08:09:32 +00:00
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
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2012-09-13 03:18:20 +00:00
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2014-01-06 15:27:20 +00:00
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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2013-06-04 07:00:15 +00:00
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#include "mx6sabre_common.h"
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2012-09-26 11:37:01 +00:00
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2012-12-30 14:14:59 +00:00
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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#if defined(CONFIG_ENV_IS_IN_MMC)
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2013-01-10 09:00:53 +00:00
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#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
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2012-12-30 14:14:59 +00:00
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#endif
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2014-03-23 21:45:41 +00:00
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#define CONFIG_CMD_PCI
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#ifdef CONFIG_CMD_PCI
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#define CONFIG_PCI
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_PCIE_IMX
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#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
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#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
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#endif
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2014-05-09 16:15:42 +00:00
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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2015-03-20 17:20:40 +00:00
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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2014-05-09 16:15:42 +00:00
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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2014-12-02 01:55:27 +00:00
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/* USB Configs */
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#define CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
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#endif
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2012-09-24 08:09:32 +00:00
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#endif /* __MX6QSABRESD_CONFIG_H */
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