2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2012-04-19 04:33:09 +00:00
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/*
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2015-12-19 21:29:24 +00:00
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* Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
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2012-04-19 04:33:09 +00:00
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*/
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#include <common.h>
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2019-12-28 17:44:58 +00:00
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#include <clock_legacy.h>
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2015-12-19 21:29:24 +00:00
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#include <dm.h>
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2012-09-13 14:51:02 +00:00
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#include <serial.h>
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2015-12-19 21:29:24 +00:00
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#include <dm/platform_data/lpc32xx_hsuart.h>
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#include <asm/arch/uart.h>
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2012-09-13 14:51:02 +00:00
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#include <linux/compiler.h>
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2012-04-19 04:33:09 +00:00
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2015-12-19 21:29:24 +00:00
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struct lpc32xx_hsuart_priv {
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struct hsuart_regs *hsuart;
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};
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2012-04-19 04:33:09 +00:00
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2015-12-19 21:29:24 +00:00
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static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
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2012-04-19 04:33:09 +00:00
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{
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2015-12-19 21:29:24 +00:00
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struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
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struct hsuart_regs *hsuart = priv->hsuart;
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2012-04-19 04:33:09 +00:00
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u32 div;
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/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
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2015-12-19 21:29:24 +00:00
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div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
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2012-04-19 04:33:09 +00:00
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if (div > 255)
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div = 255;
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writel(div, &hsuart->rate);
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2015-12-19 21:29:24 +00:00
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return 0;
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2012-04-19 04:33:09 +00:00
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}
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2015-12-19 21:29:24 +00:00
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static int lpc32xx_serial_getc(struct udevice *dev)
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2012-04-19 04:33:09 +00:00
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{
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2015-12-19 21:29:24 +00:00
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struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
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struct hsuart_regs *hsuart = priv->hsuart;
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if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
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return -EAGAIN;
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2012-04-19 04:33:09 +00:00
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return readl(&hsuart->rx) & HSUART_RX_DATA;
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}
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2015-12-19 21:29:24 +00:00
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static int lpc32xx_serial_putc(struct udevice *dev, const char c)
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2012-04-19 04:33:09 +00:00
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{
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2015-12-19 21:29:24 +00:00
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struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
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struct hsuart_regs *hsuart = priv->hsuart;
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/* Wait for empty FIFO */
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if (readl(&hsuart->level) & HSUART_LEVEL_TX)
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return -EAGAIN;
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2013-11-30 14:47:01 +00:00
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2012-04-19 04:33:09 +00:00
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writel(c, &hsuart->tx);
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2015-12-19 21:29:24 +00:00
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return 0;
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2012-04-19 04:33:09 +00:00
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}
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2015-12-19 21:29:24 +00:00
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static int lpc32xx_serial_pending(struct udevice *dev, bool input)
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2012-04-19 04:33:09 +00:00
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{
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2015-12-19 21:29:24 +00:00
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struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
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struct hsuart_regs *hsuart = priv->hsuart;
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if (input) {
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if (readl(&hsuart->level) & HSUART_LEVEL_RX)
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return 1;
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} else {
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if (readl(&hsuart->level) & HSUART_LEVEL_TX)
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return 1;
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}
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2012-04-19 04:33:09 +00:00
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return 0;
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}
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2015-12-19 21:29:24 +00:00
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static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
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2012-04-19 04:33:09 +00:00
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{
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/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
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writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
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HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
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&hsuart->ctrl);
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2015-12-19 21:29:24 +00:00
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2012-09-13 14:51:02 +00:00
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return 0;
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2012-04-19 04:33:09 +00:00
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}
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2015-12-19 21:29:24 +00:00
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static int lpc32xx_hsuart_probe(struct udevice *dev)
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{
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2020-12-03 23:55:20 +00:00
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struct lpc32xx_hsuart_platdata *plat = dev_get_plat(dev);
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2015-12-19 21:29:24 +00:00
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struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
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2020-12-03 23:55:18 +00:00
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priv->hsuart = (struct hsuart_regs *)plat->base;
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2015-12-19 21:29:24 +00:00
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lpc32xx_serial_init(priv->hsuart);
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return 0;
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}
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static const struct dm_serial_ops lpc32xx_hsuart_ops = {
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2012-09-13 14:51:02 +00:00
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.setbrg = lpc32xx_serial_setbrg,
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.getc = lpc32xx_serial_getc,
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2015-12-19 21:29:24 +00:00
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.putc = lpc32xx_serial_putc,
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.pending = lpc32xx_serial_pending,
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2012-09-13 14:51:02 +00:00
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};
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2015-12-19 21:29:24 +00:00
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U_BOOT_DRIVER(lpc32xx_hsuart) = {
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.name = "lpc32xx_hsuart",
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.id = UCLASS_SERIAL,
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.probe = lpc32xx_hsuart_probe,
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.ops = &lpc32xx_hsuart_ops,
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2020-12-03 23:55:17 +00:00
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.priv_auto = sizeof(struct lpc32xx_hsuart_priv),
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2015-12-19 21:29:24 +00:00
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.flags = DM_FLAG_PRE_RELOC,
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};
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