2011-04-14 12:09:41 +00:00
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/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/tegra2.h>
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2011-10-31 06:51:35 +00:00
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#include <asm/arch/pinmux.h>
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2011-09-21 12:40:07 +00:00
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#include <asm/gpio.h>
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#ifdef CONFIG_TEGRA2_MMC
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#include <mmc.h>
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#endif
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2011-10-31 06:51:35 +00:00
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#include "../common/board.h"
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2011-04-14 12:09:41 +00:00
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/*
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* Routine: gpio_config_uart
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* Description: Force GPIO_PI3 low on Seaboard so UART4 works.
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*/
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void gpio_config_uart(void)
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{
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int gp = GPIO_PI3;
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struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
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struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
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u32 val;
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/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
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val = readl(&bank->gpio_config[GPIO_PORT(gp)]);
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val |= 1 << GPIO_BIT(gp);
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writel(val, &bank->gpio_config[GPIO_PORT(gp)]);
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val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
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val &= ~(1 << GPIO_BIT(gp));
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writel(val, &bank->gpio_out[GPIO_PORT(gp)]);
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val = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
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val |= 1 << GPIO_BIT(gp);
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writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]);
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}
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2011-09-21 12:40:07 +00:00
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#ifdef CONFIG_TEGRA2_MMC
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2011-10-31 06:51:35 +00:00
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/*
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* Routine: pin_mux_mmc
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* Description: setup the pin muxes/tristate values for the SDMMC(s)
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*/
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static void pin_mux_mmc(void)
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{
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/* SDMMC4: config 3, x8 on 2nd set of pins */
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pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
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pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
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pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
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pinmux_tristate_disable(PINGRP_ATB);
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pinmux_tristate_disable(PINGRP_GMA);
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pinmux_tristate_disable(PINGRP_GME);
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/* SDMMC3: SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */
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pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
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pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
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pinmux_tristate_disable(PINGRP_SDC);
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pinmux_tristate_disable(PINGRP_SDD);
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pinmux_tristate_disable(PINGRP_SDB);
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/* For power GPIO PI6 */
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pinmux_tristate_disable(PINGRP_ATA);
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/* For CD GPIO PI5 */
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pinmux_tristate_disable(PINGRP_ATC);
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}
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2011-09-21 12:40:07 +00:00
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/*
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* Routine: gpio_config_mmc
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* Description: Set GPIOs for SDMMC3 SDIO slot.
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*/
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void gpio_config_mmc(void)
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{
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/* Set EN_VDDIO_SD (GPIO I6) */
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gpio_direction_output(GPIO_PI6, 1);
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/* Config pin as GPI for Card Detect (GPIO I5) */
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gpio_direction_input(GPIO_PI5);
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}
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2011-10-31 06:51:35 +00:00
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/* this is a weak define that we are overriding */
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int board_mmc_init(bd_t *bd)
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{
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debug("board_mmc_init called\n");
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/* Enable muxes, etc. for SDMMC controllers */
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pin_mux_mmc();
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gpio_config_mmc();
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debug("board_mmc_init: init eMMC\n");
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/* init dev 0, eMMC chip, with 4-bit bus */
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/* The board has an 8-bit bus, but 8-bit doesn't work yet */
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tegra2_mmc_init(0, 4);
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debug("board_mmc_init: init SD slot\n");
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/* init dev 1, SD slot, with 4-bit bus */
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tegra2_mmc_init(1, 4);
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return 0;
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}
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2011-09-21 12:40:07 +00:00
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/* this is a weak define that we are overriding */
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int board_mmc_getcd(u8 *cd, struct mmc *mmc)
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{
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debug("board_mmc_getcd called\n");
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*cd = 1; /* Assume card is inserted, or eMMC */
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if (IS_SD(mmc)) {
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/* Seaboard SDMMC3 = SDIO3_CD = GPIO_PI5 */
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if (gpio_get_value(GPIO_PI5))
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*cd = 0;
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}
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return 0;
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}
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#endif
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