pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <libfdt.h>
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#include <linux/err.h>
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#include <linux/list.h>
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#include <dm/device.h>
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#include <dm/lists.h>
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#include <dm/pinctrl.h>
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#include <dm/uclass.h>
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DECLARE_GLOBAL_DATA_PTR;
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#if CONFIG_IS_ENABLED(PINCTRL_FULL)
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/**
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* pinctrl_config_one() - apply pinctrl settings for a single node
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*
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* @config: pin configuration node
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinctrl_config_one(struct udevice *config)
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{
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struct udevice *pctldev;
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const struct pinctrl_ops *ops;
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pctldev = config;
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for (;;) {
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pctldev = dev_get_parent(pctldev);
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if (!pctldev) {
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dev_err(config, "could not find pctldev\n");
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return -EINVAL;
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}
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if (pctldev->uclass->uc_drv->id == UCLASS_PINCTRL)
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break;
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}
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ops = pinctrl_get_ops(pctldev);
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return ops->set_state(pctldev, config);
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}
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/**
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* pinctrl_select_state_full() - full implementation of pinctrl_select_state
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*
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* @dev: peripheral device
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* @statename: state name, like "default"
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinctrl_select_state_full(struct udevice *dev, const char *statename)
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{
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const void *fdt = gd->fdt_blob;
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int node = dev->of_offset;
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char propname[32]; /* long enough */
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const fdt32_t *list;
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uint32_t phandle;
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int config_node;
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struct udevice *config;
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int state, size, i, ret;
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state = fdt_find_string(fdt, node, "pinctrl-names", statename);
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if (state < 0) {
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char *end;
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/*
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* If statename is not found in "pinctrl-names",
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* assume statename is just the integer state ID.
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*/
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state = simple_strtoul(statename, &end, 10);
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if (*end)
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return -EINVAL;
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}
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snprintf(propname, sizeof(propname), "pinctrl-%d", state);
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list = fdt_getprop(fdt, node, propname, &size);
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if (!list)
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return -EINVAL;
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size /= sizeof(*list);
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for (i = 0; i < size; i++) {
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phandle = fdt32_to_cpu(*list++);
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config_node = fdt_node_offset_by_phandle(fdt, phandle);
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if (config_node < 0) {
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dev_err(dev, "prop %s index %d invalid phandle\n",
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propname, i);
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return -EINVAL;
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}
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ret = uclass_get_device_by_of_offset(UCLASS_PINCONFIG,
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config_node, &config);
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if (ret)
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return ret;
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ret = pinctrl_config_one(config);
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if (ret)
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return ret;
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}
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return 0;
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}
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/**
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* pinconfig_post-bind() - post binding for PINCONFIG uclass
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* Recursively bind its children as pinconfig devices.
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*
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* @dev: pinconfig device
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinconfig_post_bind(struct udevice *dev)
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{
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const void *fdt = gd->fdt_blob;
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int offset = dev->of_offset;
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const char *name;
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int ret;
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for (offset = fdt_first_subnode(fdt, offset);
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offset > 0;
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offset = fdt_next_subnode(fdt, offset)) {
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/*
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* If this node has "compatible" property, this is not
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* a pin configuration node, but a normal device. skip.
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*/
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fdt_get_property(fdt, offset, "compatible", &ret);
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if (ret >= 0)
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continue;
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if (ret != -FDT_ERR_NOTFOUND)
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return ret;
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name = fdt_get_name(fdt, offset, NULL);
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if (!name)
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return -EINVAL;
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ret = device_bind_driver_to_node(dev, "pinconfig", name,
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offset, NULL);
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if (ret)
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return ret;
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}
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return 0;
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}
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UCLASS_DRIVER(pinconfig) = {
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.id = UCLASS_PINCONFIG,
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.post_bind = pinconfig_post_bind,
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.name = "pinconfig",
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};
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U_BOOT_DRIVER(pinconfig_generic) = {
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.name = "pinconfig",
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.id = UCLASS_PINCONFIG,
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};
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#else
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static int pinctrl_select_state_full(struct udevice *dev, const char *statename)
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{
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return -ENODEV;
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}
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static int pinconfig_post_bind(struct udevice *dev)
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{
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2015-09-05 16:44:50 +00:00
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return 0;
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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}
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#endif
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/**
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* pinctrl_select_state_simple() - simple implementation of pinctrl_select_state
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*
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* @dev: peripheral device
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinctrl_select_state_simple(struct udevice *dev)
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{
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struct udevice *pctldev;
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struct pinctrl_ops *ops;
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int ret;
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/*
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* For simplicity, assume the first device of PINCTRL uclass
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* is the correct one. This is most likely OK as there is
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* usually only one pinctrl device on the system.
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*/
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pctldev);
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if (ret)
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return ret;
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ops = pinctrl_get_ops(pctldev);
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if (!ops->set_state_simple) {
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dev_dbg(dev, "set_state_simple op missing\n");
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return -ENOSYS;
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}
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return ops->set_state_simple(pctldev, dev);
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}
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int pinctrl_select_state(struct udevice *dev, const char *statename)
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{
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/*
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* Try full-implemented pinctrl first.
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* If it fails or is not implemented, try simple one.
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*/
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if (pinctrl_select_state_full(dev, statename))
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return pinctrl_select_state_simple(dev);
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return 0;
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}
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2015-08-30 22:55:13 +00:00
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int pinctrl_request(struct udevice *dev, int func, int flags)
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{
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struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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if (!ops->request)
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return -ENOSYS;
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return ops->request(dev, func, flags);
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}
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int pinctrl_request_noflags(struct udevice *dev, int func)
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{
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return pinctrl_request(dev, func, 0);
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}
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int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph)
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{
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struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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if (!ops->get_periph_id)
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return -ENOSYS;
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return ops->get_periph_id(dev, periph);
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}
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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/**
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* pinconfig_post-bind() - post binding for PINCTRL uclass
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* Recursively bind child nodes as pinconfig devices in case of full pinctrl.
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*
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* @dev: pinctrl device
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* @return: 0 on success, or negative error code on failure
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*/
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static int pinctrl_post_bind(struct udevice *dev)
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{
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const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
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if (!ops) {
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dev_dbg(dev, "ops is not set. Do not bind.\n");
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return -EINVAL;
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}
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/*
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2015-09-05 16:44:50 +00:00
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* If set_state callback is set, we assume this pinctrl driver is the
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* full implementation. In this case, its child nodes should be bound
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* so that peripheral devices can easily search in parent devices
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* during later DT-parsing.
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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*/
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2015-09-05 16:44:50 +00:00
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if (ops->set_state)
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return pinconfig_post_bind(dev);
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return 0;
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pinctrl: add pin control uclass support
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-27 03:44:29 +00:00
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}
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UCLASS_DRIVER(pinctrl) = {
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.id = UCLASS_PINCTRL,
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.post_bind = pinctrl_post_bind,
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.name = "pinctrl",
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};
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