2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2017-02-22 08:21:56 +00:00
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX7ULP EVK board.
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*/
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#ifndef __MX7ULP_EVK_CONFIG_H
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#define __MX7ULP_EVK_CONFIG_H
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#include <linux/sizes.h>
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#include <asm/arch/imx-regs.h>
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/*Uncomment it to use secure boot*/
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/*#define CONFIG_SECURE_BOOT*/
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#ifdef CONFIG_SECURE_BOOT
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#ifndef CONFIG_CSF_SIZE
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#define CONFIG_CSF_SIZE 0x4000
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#endif
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#endif
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#define CONFIG_BOARD_POSTCLK_INIT
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#define CONFIG_SYS_BOOTM_LEN 0x1000000
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#define SRC_BASE_ADDR CMC1_RBASE
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#define IRAM_BASE_ADDR OCRAM_0_BASE
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#define IOMUXC_BASE_ADDR IOMUXC1_RBASE
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2017-02-22 08:21:57 +00:00
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#define CONFIG_FSL_USDHC
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#define CONFIG_ENV_OFFSET (12 * SZ_64K)
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2017-02-22 08:21:56 +00:00
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#define CONFIG_ENV_SIZE SZ_8K
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/* Using ULP WDOG for reset */
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#define WDOG_BASE_ADDR WDG1_RBASE
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#define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */
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#define CONFIG_INITRD_TAG
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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/*#define CONFIG_REVISION_TAG*/
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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/* UART */
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#define LPUART_BASE LPUART4_RBASE
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_CACHELINE_SIZE 64
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_PROMPT "=> "
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#define CONFIG_SYS_CBSIZE 512
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#define CONFIG_SYS_MAXARGS 256
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/* Physical Memory Map */
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#define PHYS_SDRAM 0x60000000
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#define PHYS_SDRAM_SIZE SZ_1G
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#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_LOADADDR 0x60800000
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#define CONFIG_SYS_MEMTEST_END 0x9E000000
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2017-02-22 08:21:57 +00:00
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttyLP0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx7ulp-evk.dtb\0" \
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"fdt_addr=0x63000000\0" \
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"boot_fdt=try\0" \
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"earlycon=lpuart32,0x402D0010\0" \
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"ip_dyn=yes\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"usb start; "\
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"fi; " \
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"fi; " \
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"fi"
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2017-02-22 08:21:56 +00:00
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE SZ_256K
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#ifndef CONFIG_SYS_DCACHE_OFF
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#define CONFIG_CMD_CACHE
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#endif
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#endif /* __CONFIG_H */
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