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u-boot/configs/orangepi_zero_plus_defconfig

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sun50i: h5: Add initial Orange Pi Zero Plus support Orange Pi Zero Plus is an open-source single-board computer using the Allwinner H5 SOC. H5 Orangepi Zero Plus has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot - 16MBit SPI Nor flash - Debug TTL UART - 1GBit/s Ethernet (RTL8211E) - Wifi (RTL8189FTV) - USB 2.0 Host - USB 2.0 OTG + power supply The device tree file is copied from the Linux kernel 4.17. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-09 16:34:46 +00:00
CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL=y
CONFIG_MACH_SUN50I_H5=y
CONFIG_DRAM_CLK=624
CONFIG_DRAM_ZQ=3881977
arm: sunxi: Enable DRAM ODT by default on H3/H5 Most of the boards we support with H3/H5 enable DRAM on-die termination, which is consistent with the high DRAM clocks that are used. Make it the default (like it's done for other similar platforms) instead of defining it in each defconfig. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-03-14 10:36:16 +00:00
# CONFIG_DRAM_ODT_EN is not set
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-16 12:16:24 +00:00
CONFIG_NR_DRAM_BANKS=1
sun50i: h5: Add initial Orange Pi Zero Plus support Orange Pi Zero Plus is an open-source single-board computer using the Allwinner H5 SOC. H5 Orangepi Zero Plus has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot - 16MBit SPI Nor flash - Debug TTL UART - 1GBit/s Ethernet (RTL8211E) - Wifi (RTL8189FTV) - USB 2.0 Host - USB 2.0 OTG + power supply The device tree file is copied from the Linux kernel 4.17. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-09 16:34:46 +00:00
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-03 19:26:12 +00:00
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus"
sun50i: h5: Add initial Orange Pi Zero Plus support Orange Pi Zero Plus is an open-source single-board computer using the Allwinner H5 SOC. H5 Orangepi Zero Plus has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot - 16MBit SPI Nor flash - Debug TTL UART - 1GBit/s Ethernet (RTL8211E) - Wifi (RTL8189FTV) - USB 2.0 Host - USB 2.0 OTG + power supply The device tree file is copied from the Linux kernel 4.17. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-09 16:34:46 +00:00
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-02-07 19:53:03 +00:00
CONFIG_USB_OHCI_HCD=y
sun50i: h5: Add initial Orange Pi Zero Plus support Orange Pi Zero Plus is an open-source single-board computer using the Allwinner H5 SOC. H5 Orangepi Zero Plus has - Quad-core Cortex-A53 - 512MB DDR3 - micrSD slot - 16MBit SPI Nor flash - Debug TTL UART - 1GBit/s Ethernet (RTL8211E) - Wifi (RTL8189FTV) - USB 2.0 Host - USB 2.0 OTG + power supply The device tree file is copied from the Linux kernel 4.17. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-09 16:34:46 +00:00
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
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