u-boot/arch/x86/cpu/apollolake/Makefile

# SPDX-License-Identifier: GPL-2.0+
#
# Copyright 2019 Google LLC

obj-$(CONFIG_SPL_BUILD) += cpu_spl.o
obj-$(CONFIG_SPL_BUILD) += spl.o
obj-$(CONFIG_SPL_BUILD) += systemagent.o
obj-y += cpu_common.o

ifndef CONFIG_TPL_BUILD
obj-y += cpu.o
obj-y += punit.o
endif

obj-y += hostbridge.o
obj-y += itss.o
obj-y += lpc.o
obj-y += p2sb.o
obj-y += pch.o
obj-y += pmc.o
obj-y += uart.o
x86: apl: Add PMC driver Add a driver for the Apollo Lake SoC. It supports the basic operations and can use device tree or of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-06 21:42:57 -07:00			`# SPDX-License-Identifier: GPL-2.0+`
			`#`
			`# Copyright 2019 Google LLC`

x86: apl: Add SPL/TPL init Add code to init the system both in TPL and SPL. Each phase has its own procedure. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:15 -07:00			`obj-$(CONFIG_SPL_BUILD) += cpu_spl.o`
x86: apl: Add SPL loaders Add loaders for SPL and TPL so that the next stage can be loaded from memory-mapped SPI or, failing that, the Fast SPI driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:13 -07:00			`obj-$(CONFIG_SPL_BUILD) += spl.o`
x86: apl: Add systemagent driver This driver handles communication with the systemagent which needs to be told when U-Boot has completed its init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:32:10 -07:00			`obj-$(CONFIG_SPL_BUILD) += systemagent.o`
x86: apl: Add a CPU driver Add a bare-bones CPU driver so that CPUs can be probed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:14 -07:00			`obj-y += cpu_common.o`
x86: apl: Add SPL loaders Add loaders for SPL and TPL so that the next stage can be loaded from memory-mapped SPI or, failing that, the Fast SPI driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:13 -07:00
x86: apl: Add PUNIT driver Add a driver for the Apollo Lake P-unit (power unit). It is modelled as a syscon driver since it only needs to be probed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:11 -07:00			`ifndef CONFIG_TPL_BUILD`
x86: apl: Add a CPU driver Add a bare-bones CPU driver so that CPUs can be probed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:14 -07:00			`obj-y += cpu.o`
x86: apl: Add PUNIT driver Add a driver for the Apollo Lake P-unit (power unit). It is modelled as a syscon driver since it only needs to be probed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:11 -07:00			`obj-y += punit.o`
			`endif`
x86: apl: Add systemagent driver This driver handles communication with the systemagent which needs to be told when U-Boot has completed its init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:32:10 -07:00
x86: apl: Add hostbridge driver This driver models the hostbridge as a northbridge. It simply sets up the graphics BAR. It supports of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:07 -07:00			`obj-y += hostbridge.o`
x86: apl: Add ITSS driver This driver models some sort of interrupt thingy but there are so many abreviations that I cannot find out what it stands for. Possibly something to do with interrupts. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:08 -07:00			`obj-y += itss.o`
x86: apl: Add LPC driver This driver the LPC and provides a few functions to set up LPC features. These should probably use ioctls() or perhaps, better, have specific uclass methods. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:09 -07:00			`obj-y += lpc.o`
x86: apl: Add P2SB driver Adds a driver for the Apollo Lake Primary-to-sideband bus. This supports various child devices. It supposed both device tree and of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:16 -07:00			`obj-y += p2sb.o`
x86: apl: Add PCH driver Add a driver for the Apollo Lake Platform Controller Hub. It does not have any functionality and is just a placeholder for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-08 17:40:10 -07:00			`obj-y += pch.o`
x86: apl: Add PMC driver Add a driver for the Apollo Lake SoC. It supports the basic operations and can use device tree or of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-06 21:42:57 -07:00			`obj-y += pmc.o`
x86: apl: Add UART driver Add a driver for the Apollo Lake UART. It uses the standard ns16550 device but also sets up the input clock with LPSS and supports configuration via of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 2019-12-06 21:42:58 -07:00			`obj-y += uart.o`