mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 17:41:08 +00:00
125 lines
1.9 KiB
Text
125 lines
1.9 KiB
Text
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/*
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* Device Tree Source for the Draak board
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*
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* Copyright (C) 2016 Renesas Electronics Corp.
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* Copyright (C) 2017 Glider bvba
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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#include "r8a77995.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Renesas Draak board based on r8a77995";
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compatible = "renesas,draak", "renesas,r8a77995";
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aliases {
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serial0 = &scif2;
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ethernet0 = &avb;
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};
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chosen {
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bootargs = "ignore_loglevel";
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stdout-path = "serial0:115200n8";
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};
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0x0 0x48000000 0x0 0x18000000>;
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};
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};
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&extal_clk {
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clock-frequency = <48000000>;
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};
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&pfc {
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avb0_pins: avb {
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mux {
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groups = "avb0_link", "avb0_mdc", "avb0_mii";
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function = "avb0";
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};
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};
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pwm0_pins: pwm0 {
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groups = "pwm0_c";
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function = "pwm0";
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};
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pwm1_pins: pwm1 {
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groups = "pwm1_c";
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function = "pwm1";
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};
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scif2_pins: scif2 {
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groups = "scif2_data";
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function = "scif2";
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};
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usb0_pins: usb0 {
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groups = "usb0";
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function = "usb0";
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};
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};
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&ehci0 {
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&avb {
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pinctrl-0 = <&avb0_pins>;
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pinctrl-names = "default";
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renesas,no-ether-link;
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phy-handle = <&phy0>;
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status = "okay";
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phy0: ethernet-phy@0 {
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio5>;
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interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&scif2 {
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pinctrl-0 = <&scif2_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usb2_phy0 {
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&pwm0 {
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pinctrl-0 = <&pwm0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&pwm1 {
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pinctrl-0 = <&pwm1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&rwdt {
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timeout-sec = <60>;
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status = "okay";
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};
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