2002-09-18 19:21:21 +00:00
|
|
|
/*
|
|
|
|
* (C) Copyright 2000-2002
|
|
|
|
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
|
|
|
*
|
|
|
|
* (C) Copyright 2002 (440 port)
|
|
|
|
* Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
|
|
|
|
*
|
2004-02-06 23:19:44 +00:00
|
|
|
* (C) Copyright 2003 (440GX port)
|
|
|
|
* Travis B. Sawyer, Sandburst Corporation, tsawyer@sandburst.com
|
|
|
|
*
|
2008-07-17 09:44:12 +00:00
|
|
|
* (C) Copyright 2008 (PPC440X05 port for Virtex 5 FX)
|
|
|
|
* Ricardo Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es
|
|
|
|
* Work supported by Qtechnology (htpp://qtec.com)
|
|
|
|
*
|
2002-09-18 19:21:21 +00:00
|
|
|
* See file CREDITS for list of people who contributed to this
|
|
|
|
* project.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License as
|
|
|
|
* published by the Free Software Foundation; either version 2 of
|
|
|
|
* the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
* GNU General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
* along with this program; if not, write to the Free Software
|
|
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
|
|
* MA 02111-1307 USA
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
|
|
|
#include <watchdog.h>
|
|
|
|
#include <command.h>
|
|
|
|
#include <asm/processor.h>
|
2008-07-17 09:44:12 +00:00
|
|
|
#include <asm/interrupt.h>
|
2002-09-18 19:21:21 +00:00
|
|
|
#include <ppc4xx.h>
|
|
|
|
#include <ppc_asm.tmpl>
|
|
|
|
#include <commproc.h>
|
|
|
|
|
2008-06-26 11:40:57 +00:00
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
|
2002-09-18 19:21:21 +00:00
|
|
|
/*
|
|
|
|
* CPM interrupt vector functions.
|
|
|
|
*/
|
|
|
|
struct irq_action {
|
|
|
|
interrupt_handler_t *handler;
|
|
|
|
void *arg;
|
|
|
|
int count;
|
|
|
|
};
|
2008-07-17 09:44:12 +00:00
|
|
|
static struct irq_action irq_vecs[IRQ_MAX];
|
2002-09-18 19:21:21 +00:00
|
|
|
|
|
|
|
#if defined(CONFIG_440)
|
|
|
|
|
|
|
|
/* SPRN changed in 440 */
|
|
|
|
static __inline__ void set_evpr(unsigned long val)
|
|
|
|
{
|
|
|
|
asm volatile("mtspr 0x03f,%0" : : "r" (val));
|
|
|
|
}
|
|
|
|
|
|
|
|
#else /* !defined(CONFIG_440) */
|
|
|
|
|
|
|
|
static __inline__ void set_pit(unsigned long val)
|
|
|
|
{
|
|
|
|
asm volatile("mtpit %0" : : "r" (val));
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static __inline__ void set_tcr(unsigned long val)
|
|
|
|
{
|
|
|
|
asm volatile("mttcr %0" : : "r" (val));
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static __inline__ void set_evpr(unsigned long val)
|
|
|
|
{
|
|
|
|
asm volatile("mtevpr %0" : : "r" (val));
|
|
|
|
}
|
|
|
|
#endif /* defined(CONFIG_440 */
|
|
|
|
|
2003-12-06 19:49:23 +00:00
|
|
|
int interrupt_init_cpu (unsigned *decrementer_count)
|
2002-09-18 19:21:21 +00:00
|
|
|
{
|
|
|
|
int vec;
|
|
|
|
unsigned long val;
|
|
|
|
|
2003-12-06 19:49:23 +00:00
|
|
|
/* decrementer is automatically reloaded */
|
|
|
|
*decrementer_count = 0;
|
2004-01-02 14:00:00 +00:00
|
|
|
|
2002-09-18 19:21:21 +00:00
|
|
|
/*
|
|
|
|
* Mark all irqs as free
|
|
|
|
*/
|
2008-07-17 09:44:12 +00:00
|
|
|
for (vec = 0; vec < IRQ_MAX; vec++) {
|
2002-09-18 19:21:21 +00:00
|
|
|
irq_vecs[vec].handler = NULL;
|
|
|
|
irq_vecs[vec].arg = NULL;
|
|
|
|
irq_vecs[vec].count = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_4xx
|
|
|
|
/*
|
|
|
|
* Init PIT
|
|
|
|
*/
|
|
|
|
#if defined(CONFIG_440)
|
|
|
|
val = mfspr( tcr );
|
|
|
|
val &= (~0x04400000); /* clear DIS & ARE */
|
|
|
|
mtspr( tcr, val );
|
|
|
|
mtspr( dec, 0 ); /* Prevent exception after TSR clear*/
|
|
|
|
mtspr( decar, 0 ); /* clear reload */
|
|
|
|
mtspr( tsr, 0x08000000 ); /* clear DEC status */
|
2005-04-07 05:32:44 +00:00
|
|
|
val = gd->bd->bi_intfreq/1000; /* 1 msec */
|
2002-09-18 19:21:21 +00:00
|
|
|
mtspr( decar, val ); /* Set auto-reload value */
|
|
|
|
mtspr( dec, val ); /* Set inital val */
|
|
|
|
#else
|
|
|
|
set_pit(gd->bd->bi_intfreq / 1000);
|
|
|
|
#endif
|
|
|
|
#endif /* CONFIG_4xx */
|
|
|
|
|
|
|
|
#ifdef CONFIG_ADCIOP
|
|
|
|
/*
|
|
|
|
* Init PIT
|
|
|
|
*/
|
|
|
|
set_pit(66000);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Enable PIT
|
|
|
|
*/
|
|
|
|
val = mfspr(tcr);
|
|
|
|
val |= 0x04400000;
|
|
|
|
mtspr(tcr, val);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set EVPR to 0
|
|
|
|
*/
|
|
|
|
set_evpr(0x00000000);
|
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
/*
|
2008-07-18 10:24:41 +00:00
|
|
|
* Call uic or xilinx_irq pic_enable
|
2008-07-17 09:44:12 +00:00
|
|
|
*/
|
|
|
|
pic_enable();
|
2002-09-18 19:21:21 +00:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
void timer_interrupt_cpu(struct pt_regs *regs)
|
2004-02-06 23:19:44 +00:00
|
|
|
{
|
2008-07-17 09:44:12 +00:00
|
|
|
/* nothing to do here */
|
|
|
|
return;
|
2002-09-18 19:21:21 +00:00
|
|
|
}
|
2004-02-06 23:19:44 +00:00
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
void interrupt_run_handler(int vec)
|
2004-02-06 23:19:44 +00:00
|
|
|
{
|
2008-07-17 09:44:12 +00:00
|
|
|
irq_vecs[vec].count++;
|
|
|
|
|
|
|
|
if (irq_vecs[vec].handler != NULL) {
|
|
|
|
/* call isr */
|
|
|
|
(*irq_vecs[vec].handler) (irq_vecs[vec].arg);
|
|
|
|
} else {
|
|
|
|
pic_irq_disable(vec);
|
|
|
|
printf("Masking bogus interrupt vector %d\n", vec);
|
|
|
|
}
|
2006-06-30 14:30:46 +00:00
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
pic_irq_ack(vec);
|
2008-02-19 21:07:57 +00:00
|
|
|
return;
|
2006-06-30 14:30:46 +00:00
|
|
|
}
|
2002-09-18 19:21:21 +00:00
|
|
|
|
2008-02-19 21:07:57 +00:00
|
|
|
void irq_install_handler(int vec, interrupt_handler_t * handler, void *arg)
|
2002-09-18 19:21:21 +00:00
|
|
|
{
|
2005-08-01 14:41:48 +00:00
|
|
|
/*
|
2008-02-19 21:07:57 +00:00
|
|
|
* Print warning when replacing with a different irq vector
|
2005-08-01 14:41:48 +00:00
|
|
|
*/
|
2008-02-19 21:07:57 +00:00
|
|
|
if ((irq_vecs[vec].handler != NULL) && (irq_vecs[vec].handler != handler)) {
|
|
|
|
printf("Interrupt vector %d: handler 0x%x replacing 0x%x\n",
|
|
|
|
vec, (uint) handler, (uint) irq_vecs[vec].handler);
|
2002-09-18 19:21:21 +00:00
|
|
|
}
|
2008-02-19 21:07:57 +00:00
|
|
|
irq_vecs[vec].handler = handler;
|
|
|
|
irq_vecs[vec].arg = arg;
|
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
pic_irq_enable(vec);
|
|
|
|
return;
|
2002-09-18 19:21:21 +00:00
|
|
|
}
|
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
void irq_free_handler(int vec)
|
2002-09-18 19:21:21 +00:00
|
|
|
{
|
2008-02-19 21:07:57 +00:00
|
|
|
debug("Free interrupt for vector %d ==> %p\n",
|
|
|
|
vec, irq_vecs[vec].handler);
|
2002-09-18 19:21:21 +00:00
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
pic_irq_disable(vec);
|
2002-09-18 19:21:21 +00:00
|
|
|
|
2008-02-19 21:07:57 +00:00
|
|
|
irq_vecs[vec].handler = NULL;
|
|
|
|
irq_vecs[vec].arg = NULL;
|
2003-12-06 19:49:23 +00:00
|
|
|
return;
|
2002-09-18 19:21:21 +00:00
|
|
|
}
|
|
|
|
|
2007-07-09 23:57:22 +00:00
|
|
|
#if defined(CONFIG_CMD_IRQ)
|
2008-02-19 21:07:57 +00:00
|
|
|
int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
|
2002-09-18 19:21:21 +00:00
|
|
|
{
|
|
|
|
int vec;
|
|
|
|
|
2008-02-19 21:07:57 +00:00
|
|
|
printf ("Interrupt-Information:\n");
|
2002-09-18 19:21:21 +00:00
|
|
|
printf ("Nr Routine Arg Count\n");
|
|
|
|
|
2008-07-17 09:44:12 +00:00
|
|
|
for (vec = 0; vec < IRQ_MAX; vec++) {
|
2002-09-18 19:21:21 +00:00
|
|
|
if (irq_vecs[vec].handler != NULL) {
|
|
|
|
printf ("%02d %08lx %08lx %d\n",
|
|
|
|
vec,
|
|
|
|
(ulong)irq_vecs[vec].handler,
|
|
|
|
(ulong)irq_vecs[vec].arg,
|
|
|
|
irq_vecs[vec].count);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2004-02-06 23:19:44 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2007-07-09 23:57:22 +00:00
|
|
|
#endif
|