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u-boot/arch/mips/dts/brcm,bcm6338.dtsi

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SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-06 21:58:06 +00:00
// SPDX-License-Identifier: GPL-2.0+
MIPS: add support for Broadcom MIPS BCM6338 SoC family Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-16 16:46:58 +00:00
/*
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*/
#include <dt-bindings/clock/bcm6338-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/reset/bcm6338-reset.h>
#include "skeleton.dtsi"
/ {
compatible = "brcm,bcm6338";
mips: bmips: add bcm63xx-spi driver support for BCM6338 This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-23 16:14:59 +00:00
aliases {
spi0 = &spi;
};
MIPS: add support for Broadcom MIPS BCM6338 SoC family Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-16 16:46:58 +00:00
cpus {
reg = <0xfffe0000 0x4>;
#address-cells = <1>;
#size-cells = <0>;
u-boot,dm-pre-reloc;
cpu@0 {
compatible = "brcm,bcm6338-cpu", "mips,mips4Kc";
device_type = "cpu";
reg = <0>;
u-boot,dm-pre-reloc;
};
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
u-boot,dm-pre-reloc;
};
periph_clk: periph-clk {
compatible = "brcm,bcm6345-clk";
reg = <0xfffe0004 0x4>;
#clock-cells = <1>;
};
};
pflash: nor@1fc00000 {
compatible = "cfi-flash";
reg = <0x1fc00000 0x400000>;
bank-width = <2>;
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
};
ubus {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
pll_cntl: syscon@fffe0008 {
compatible = "syscon";
reg = <0xfffe0008 0x4>;
};
syscon-reboot {
compatible = "syscon-reboot";
regmap = <&pll_cntl>;
offset = <0x0>;
mask = <0x1>;
};
periph_rst: reset-controller@fffe0028 {
compatible = "brcm,bcm6345-reset";
reg = <0xfffe0028 0x4>;
#reset-cells = <1>;
};
wdt: watchdog@fffe021c {
compatible = "brcm,bcm6345-wdt";
reg = <0xfffe021c 0xc>;
clocks = <&periph_osc>;
};
wdt-reboot {
compatible = "wdt-reboot";
wdt = <&wdt>;
};
uart0: serial@fffe0300 {
compatible = "brcm,bcm6345-uart";
reg = <0xfffe0300 0x18>;
clocks = <&periph_osc>;
status = "disabled";
};
gpio: gpio-controller@fffe0404 {
compatible = "brcm,bcm6345-gpio";
reg = <0xfffe0404 0x4>, <0xfffe040c 0x4>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
status = "disabled";
};
mips: bmips: add bcm63xx-spi driver support for BCM6338 This driver manages the SPI controller present on this SoC. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-23 16:14:59 +00:00
spi: spi@fffe0c00 {
compatible = "brcm,bcm6348-spi";
reg = <0xfffe0c00 0xc0>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&periph_clk BCM6338_CLK_SPI>;
resets = <&periph_rst BCM6338_RST_SPI>;
spi-max-frequency = <20000000>;
num-cs = <4>;
status = "disabled";
};
MIPS: add support for Broadcom MIPS BCM6338 SoC family Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-05-16 16:46:58 +00:00
memory-controller@fffe3100 {
compatible = "brcm,bcm6338-mc";
reg = <0xfffe3100 0x38>;
u-boot,dm-pre-reloc;
};
};
};
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