2018-05-06 21:58:06 +00:00
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// SPDX-License-Identifier: GPL-2.0+
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2006-05-23 08:33:11 +00:00
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/*
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* (C) Copyright 2006
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* Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
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*/
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#include <common.h>
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2020-05-10 17:40:11 +00:00
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#include <linux/delay.h>
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2006-05-23 08:33:11 +00:00
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2008-10-16 13:01:15 +00:00
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#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
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2011-11-26 06:20:07 +00:00
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# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
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2006-05-23 11:38:35 +00:00
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#include <asm/arch/pxa-regs.h>
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2010-09-09 07:50:39 +00:00
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#include <asm/io.h>
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2007-10-19 08:55:24 +00:00
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#include <usb.h>
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2006-05-23 11:38:35 +00:00
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2007-10-19 06:10:15 +00:00
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int usb_cpu_init(void)
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2006-05-23 08:33:11 +00:00
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{
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2007-03-26 10:03:36 +00:00
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#if defined(CONFIG_CPU_MONAHANS)
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2006-05-23 08:33:11 +00:00
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/* Enable USB host clock. */
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2010-09-09 07:50:39 +00:00
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writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA);
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2006-05-23 08:33:11 +00:00
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udelay(100);
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2007-03-26 10:03:36 +00:00
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#endif
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2011-11-26 06:20:07 +00:00
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#if defined(CONFIG_CPU_PXA27X)
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2007-03-26 10:03:36 +00:00
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/* Enable USB host clock. */
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2010-09-09 07:50:39 +00:00
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writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
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2007-03-26 10:03:36 +00:00
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#endif
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2006-05-23 08:33:11 +00:00
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2007-04-03 12:27:08 +00:00
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#if defined(CONFIG_CPU_MONAHANS)
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2006-05-23 08:33:11 +00:00
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/* Configure Port 2 for Host (USB Client Registers) */
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2010-09-09 07:50:39 +00:00
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writel(0x3000c, UP2OCR);
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2006-05-23 08:33:11 +00:00
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#endif
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
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usb: replace wait_ms() with mdelay()
Common code has a mdelay() func, so use that instead of the usb-specific
wait_ms() func. This also fixes the build errors:
ohci-hcd.c: In function 'submit_common_msg':
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1519:9: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1816:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1827:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1844:10: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1563:11: sorry, unimplemented: called from here
/usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available
ohci-hcd.c:1583:9: sorry, unimplemented: called from here
make[1]: *** [ohci-hcd.o] Error 1
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Marek Vasut <marex@denx.de>
2012-03-05 13:47:00 +00:00
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mdelay(11);
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
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2006-05-23 08:33:11 +00:00
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
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while (readl(UHCHR) & UHCHR_FSBIR)
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2006-05-23 08:33:11 +00:00
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udelay(1);
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2011-10-17 15:22:47 +00:00
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#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
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2007-03-26 10:03:36 +00:00
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#endif
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2011-11-26 06:20:07 +00:00
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#if defined(CONFIG_CPU_PXA27X)
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR);
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2007-03-26 10:03:36 +00:00
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#endif
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR);
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2006-05-23 08:33:11 +00:00
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return 0;
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}
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2007-10-19 06:10:15 +00:00
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int usb_cpu_stop(void)
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2006-05-23 08:33:11 +00:00
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{
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
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2007-10-15 09:59:17 +00:00
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udelay(11);
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
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2007-10-15 09:59:17 +00:00
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2011-10-17 15:22:46 +00:00
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writel(readl(UHCCOMS) | UHCCOMS_HCR, UHCCOMS);
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2007-10-15 09:59:17 +00:00
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udelay(10);
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2011-10-17 15:22:47 +00:00
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#if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR);
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2007-10-15 09:59:17 +00:00
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#endif
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2011-11-26 06:20:07 +00:00
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#if defined(CONFIG_CPU_PXA27X)
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR);
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2007-10-15 09:59:17 +00:00
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#endif
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2010-09-09 07:50:39 +00:00
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writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR);
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2007-10-15 09:59:17 +00:00
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#if defined(CONFIG_CPU_MONAHANS)
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2010-09-09 07:50:39 +00:00
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/* Disable USB host clock. */
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writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA);
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udelay(100);
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2007-10-15 09:59:17 +00:00
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#endif
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2011-11-26 06:20:07 +00:00
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#if defined(CONFIG_CPU_PXA27X)
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2010-09-09 07:50:39 +00:00
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/* Disable USB host clock. */
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writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
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2007-10-15 09:59:17 +00:00
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#endif
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2006-05-23 08:33:11 +00:00
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return 0;
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}
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2006-05-30 14:56:14 +00:00
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2010-09-09 07:50:39 +00:00
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int usb_cpu_init_fail(void)
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{
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return usb_cpu_stop();
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}
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2011-11-26 06:20:07 +00:00
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# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */
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2008-10-16 13:01:15 +00:00
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#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
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