2018-05-06 21:58:06 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+
|
2011-11-17 00:10:24 +00:00
|
|
|
/*
|
|
|
|
* (C) Copyright 2010,2011
|
|
|
|
* NVIDIA Corporation <www.nvidia.com>
|
2012-06-04 20:02:24 +00:00
|
|
|
* (C) Copyright 2011-2012
|
2011-11-17 00:10:24 +00:00
|
|
|
* Avionic Design GmbH <www.avionic-design.de>
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
|
|
|
#include <ns16550.h>
|
|
|
|
#include <asm/io.h>
|
|
|
|
#include <asm/gpio.h>
|
|
|
|
#include <asm/arch/clock.h>
|
2012-01-11 12:42:26 +00:00
|
|
|
#include <asm/arch/funcmux.h>
|
2011-11-17 00:10:24 +00:00
|
|
|
#include <asm/arch/pinmux.h>
|
2012-09-19 22:50:56 +00:00
|
|
|
#include <asm/arch/tegra.h>
|
|
|
|
#include <asm/arch-tegra/board.h>
|
|
|
|
#include <asm/arch-tegra/clk_rst.h>
|
|
|
|
#include <asm/arch-tegra/sys_proto.h>
|
|
|
|
#include <asm/arch-tegra/uart.h>
|
2011-11-17 00:10:24 +00:00
|
|
|
|
2012-06-04 20:02:28 +00:00
|
|
|
#ifdef CONFIG_BOARD_EARLY_INIT_F
|
|
|
|
void gpio_early_init(void)
|
|
|
|
{
|
2016-05-12 18:07:39 +00:00
|
|
|
gpio_request(TEGRA_GPIO(I, 4), NULL);
|
|
|
|
gpio_direction_output(TEGRA_GPIO(I, 4), 1);
|
2012-06-04 20:02:28 +00:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-01-10 04:32:07 +00:00
|
|
|
#ifdef CONFIG_MMC_SDHCI_TEGRA
|
2011-11-17 00:10:24 +00:00
|
|
|
/*
|
|
|
|
* Routine: pin_mux_mmc
|
|
|
|
* Description: setup the pin muxes/tristate values for the SDMMC(s)
|
|
|
|
*/
|
2013-02-21 12:31:30 +00:00
|
|
|
void pin_mux_mmc(void)
|
2011-11-17 00:10:24 +00:00
|
|
|
{
|
2012-01-11 12:42:26 +00:00
|
|
|
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
|
2012-06-04 20:02:29 +00:00
|
|
|
/* for write-protect GPIO PI6 */
|
2014-03-21 18:28:58 +00:00
|
|
|
pinmux_tristate_disable(PMUX_PINGRP_ATA);
|
2012-06-04 20:02:24 +00:00
|
|
|
/* for CD GPIO PH2 */
|
2014-03-21 18:28:58 +00:00
|
|
|
pinmux_tristate_disable(PMUX_PINGRP_ATD);
|
2011-11-17 00:10:24 +00:00
|
|
|
}
|
|
|
|
#endif
|