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31 lines
665 B
C
31 lines
665 B
C
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/*
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* (C) Copyright 2012 Xilinx
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* (C) Copyright 2014 Digilent Inc.
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*
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* Configuration for Zynq Development Board - ZYBO
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* See zynq-common.h for Zynq common configs
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_ZYNQ_ZYBO_H
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#define __CONFIG_ZYNQ_ZYBO_H
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#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_ZYNQ_SERIAL_UART1
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#define CONFIG_ZYNQ_GEM0
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#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ZYNQ_SDHCI0
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#define CONFIG_ZYNQ_BOOT_FREEBSD
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/* Define ZYBO PS Clock Frequency to 50MHz */
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#define CONFIG_ZYNQ_PS_CLK_FREQ 50000000UL
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#include <configs/zynq-common.h>
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#endif /* __CONFIG_ZYNQ_ZYBO_H */
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