u-boot/arch/arm/dts/exynos5250.dtsi

/*
 * (C) Copyright 2012 SAMSUNG Electronics
 * SAMSUNG EXYNOS5250 SoC device tree source
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/include/ "exynos5.dtsi"

/ {
	i2c@12ca0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CA0000 0x100>;
		interrupts = <0 60 0>;
	};

	i2c@12cb0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CB0000 0x100>;
		interrupts = <0 61 0>;
	};

	i2c@12cc0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CC0000 0x100>;
		interrupts = <0 62 0>;
	};

	i2c@12cd0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12CD0000 0x100>;
		interrupts = <0 63 0>;
	};

	sound@3830000 {
		compatible = "samsung,exynos-sound";
		reg = <0x3830000 0x50>;
		samsung,i2s-epll-clock-frequency = <192000000>;
		samsung,i2s-sampling-rate = <48000>;
		samsung,i2s-bits-per-sample = <16>;
		samsung,i2s-channels = <2>;
		samsung,i2s-lr-clk-framesize = <256>;
		samsung,i2s-bit-clk-framesize = <32>;
		samsung,i2s-id = <0>;
	};

	sound@12d60000 {
		compatible = "samsung,exynos-sound";
		reg = <0x12d60000 0x20>;
		samsung,i2s-epll-clock-frequency = <192000000>;
		samsung,i2s-sampling-rate = <48000>;
		samsung,i2s-bits-per-sample = <16>;
		samsung,i2s-channels = <2>;
		samsung,i2s-lr-clk-framesize = <256>;
		samsung,i2s-bit-clk-framesize = <32>;
		samsung,i2s-id = <1>;
	};


	xhci@12000000 {
		compatible = "samsung,exynos5250-xhci";
		reg = <0x12000000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;

		phy {
			compatible = "samsung,exynos5250-usb3-phy";
			reg = <0x12100000 0x100>;
		};
	};

};