2016-03-19 03:41:38 +00:00
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/*
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* (C) Copyright 2016 Stephen Warren <swarren@wwwdotorg.org>
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*
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* Derived from pl01x code:
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*
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* (C) Copyright 2000
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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*
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* (C) Copyright 2004
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* ARM Ltd.
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* Philippe Robin, <philippe.robin@arm.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/* Simple U-Boot driver for the BCM283x mini UART */
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <watchdog.h>
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#include <asm/io.h>
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#include <serial.h>
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#include <dm/platform_data/serial_bcm283x_mu.h>
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#include <linux/compiler.h>
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#include <fdtdec.h>
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2016-09-26 12:26:44 +00:00
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DECLARE_GLOBAL_DATA_PTR;
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2016-03-19 03:41:38 +00:00
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struct bcm283x_mu_regs {
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u32 io;
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u32 iir;
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u32 ier;
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u32 lcr;
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u32 mcr;
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u32 lsr;
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u32 msr;
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u32 scratch;
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u32 cntl;
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u32 stat;
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u32 baud;
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};
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#define BCM283X_MU_LCR_DATA_SIZE_8 3
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#define BCM283X_MU_LSR_TX_IDLE BIT(6)
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/* This actually means not full, but is named not empty in the docs */
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#define BCM283X_MU_LSR_TX_EMPTY BIT(5)
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#define BCM283X_MU_LSR_RX_READY BIT(0)
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struct bcm283x_mu_priv {
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struct bcm283x_mu_regs *regs;
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};
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static int bcm283x_mu_serial_setbrg(struct udevice *dev, int baudrate)
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{
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struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
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struct bcm283x_mu_priv *priv = dev_get_priv(dev);
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struct bcm283x_mu_regs *regs = priv->regs;
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u32 divider;
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2016-09-26 12:26:49 +00:00
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if (plat->disabled || plat->skip_init)
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2016-03-19 03:41:38 +00:00
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return 0;
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divider = plat->clock / (baudrate * 8);
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writel(BCM283X_MU_LCR_DATA_SIZE_8, ®s->lcr);
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writel(divider - 1, ®s->baud);
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return 0;
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}
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static int bcm283x_mu_serial_probe(struct udevice *dev)
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{
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struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
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struct bcm283x_mu_priv *priv = dev_get_priv(dev);
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2016-08-15 15:48:51 +00:00
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if (plat->disabled)
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return -ENODEV;
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2016-03-19 03:41:38 +00:00
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priv->regs = (struct bcm283x_mu_regs *)plat->base;
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return 0;
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}
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static int bcm283x_mu_serial_getc(struct udevice *dev)
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{
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2016-09-26 12:26:49 +00:00
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struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
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2016-03-19 03:41:38 +00:00
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struct bcm283x_mu_priv *priv = dev_get_priv(dev);
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struct bcm283x_mu_regs *regs = priv->regs;
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u32 data;
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2016-09-26 12:26:49 +00:00
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if (plat->disabled)
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return -EAGAIN;
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2016-03-19 03:41:38 +00:00
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/* Wait until there is data in the FIFO */
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if (!(readl(®s->lsr) & BCM283X_MU_LSR_RX_READY))
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return -EAGAIN;
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data = readl(®s->io);
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return (int)data;
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}
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static int bcm283x_mu_serial_putc(struct udevice *dev, const char data)
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{
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2016-09-26 12:26:49 +00:00
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struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
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2016-03-19 03:41:38 +00:00
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struct bcm283x_mu_priv *priv = dev_get_priv(dev);
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struct bcm283x_mu_regs *regs = priv->regs;
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2016-09-26 12:26:49 +00:00
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if (plat->disabled)
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return 0;
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2016-03-19 03:41:38 +00:00
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/* Wait until there is space in the FIFO */
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if (!(readl(®s->lsr) & BCM283X_MU_LSR_TX_EMPTY))
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return -EAGAIN;
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/* Send the character */
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writel(data, ®s->io);
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return 0;
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}
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static int bcm283x_mu_serial_pending(struct udevice *dev, bool input)
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{
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2016-09-26 12:26:49 +00:00
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struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
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2016-03-19 03:41:38 +00:00
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struct bcm283x_mu_priv *priv = dev_get_priv(dev);
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struct bcm283x_mu_regs *regs = priv->regs;
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2016-09-26 12:26:49 +00:00
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unsigned int lsr;
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if (plat->disabled)
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return 0;
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lsr = readl(®s->lsr);
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2016-03-19 03:41:38 +00:00
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if (input) {
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WATCHDOG_RESET();
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2016-04-14 04:29:52 +00:00
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return (lsr & BCM283X_MU_LSR_RX_READY) ? 1 : 0;
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2016-03-19 03:41:38 +00:00
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} else {
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2016-04-14 04:29:52 +00:00
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return (lsr & BCM283X_MU_LSR_TX_IDLE) ? 0 : 1;
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2016-03-19 03:41:38 +00:00
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}
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}
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static const struct dm_serial_ops bcm283x_mu_serial_ops = {
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.putc = bcm283x_mu_serial_putc,
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.pending = bcm283x_mu_serial_pending,
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.getc = bcm283x_mu_serial_getc,
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.setbrg = bcm283x_mu_serial_setbrg,
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};
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2016-09-26 12:26:44 +00:00
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#if CONFIG_IS_ENABLED(OF_CONTROL)
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static const struct udevice_id bcm283x_mu_serial_id[] = {
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{.compatible = "brcm,bcm2835-aux-uart"},
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{}
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};
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static int bcm283x_mu_serial_ofdata_to_platdata(struct udevice *dev)
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{
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struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
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fdt_addr_t addr;
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2017-05-17 23:18:05 +00:00
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addr = devfdt_get_addr(dev);
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2016-09-26 12:26:44 +00:00
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if (addr == FDT_ADDR_T_NONE)
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return -EINVAL;
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plat->base = addr;
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2017-01-17 23:52:55 +00:00
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plat->clock = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "clock",
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1);
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plat->skip_init = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
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2016-09-26 12:26:44 +00:00
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"skip-init");
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plat->disabled = false;
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return 0;
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}
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#endif
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2016-03-19 03:41:38 +00:00
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U_BOOT_DRIVER(serial_bcm283x_mu) = {
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.name = "serial_bcm283x_mu",
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.id = UCLASS_SERIAL,
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2016-09-26 12:26:44 +00:00
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.of_match = of_match_ptr(bcm283x_mu_serial_id),
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.ofdata_to_platdata = of_match_ptr(bcm283x_mu_serial_ofdata_to_platdata),
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2016-03-19 03:41:38 +00:00
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.platdata_auto_alloc_size = sizeof(struct bcm283x_mu_serial_platdata),
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.probe = bcm283x_mu_serial_probe,
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.ops = &bcm283x_mu_serial_ops,
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.flags = DM_FLAG_PRE_RELOC,
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.priv_auto_alloc_size = sizeof(struct bcm283x_mu_priv),
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};
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