2016-06-03 13:11:34 +00:00
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Overview
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--------
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QorIQ LS1012A Development System (LS1012AQDS) is a high-performance
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development platform, with a complete debugging environment.
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The LS1012AQDS board supports the QorIQ LS1012A processor and is
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optimized to support the high-bandwidth DDR3L memory and
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a full complement of high-speed SerDes ports.
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LS1012A SoC Overview
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--------------------
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Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1012A
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SoC overview.
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LS1012AQDS board Overview
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-----------------------
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- SERDES Connections, 4 lanes supporting:
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- PCI Express - 3.0
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- SGMII, SGMII 2.5
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- SATA 3.0
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- DDR Controller
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- 16-bit, 1 GB DDR3L SDRAM memory, running at data rates up to 1 GT/s
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- QSPI Controller
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- A dual 1:3 switch, NX3L4357GM,115 (U35) drives the QSPI chip-select
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signals to QSPI NOR flash memory (2 virtual banks) and the QSPI
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emulator
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- USB 3.0
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- One USB 3.0 controller with integrated PHY
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- One high-speed USB 3.0 port
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- USB 2.0
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- One USB 2.0 controller with ULPI interface
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- Two enhanced secure digital host controllers:
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- SDHC1 controller can be connected to onboard SDHC connector
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- SDHC2 controller: 1-/4-bit SD/MMC card supporting 1.8 V devices
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- 2 I2C controllers
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- One SATA onboard connectors
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- UART
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- 5 SAI
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- One SAI port with audio codec SGTL5000:
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• Provides MIC bias
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• Provides headphone and line output
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- One SAI port terminated at 2x6 header
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- Three SAI Tx/Rx ports terminated at 2x3 headers
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- ARM JTAG support
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Booting Options
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---------------
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a) QSPI Flash Emu Boot
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b) QSPI Flash 1
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c) QSPI Flash 2
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QSPI flash map
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--------------
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Images | Size |QSPI Flash Address
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------------------------------------------
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RCW + PBI | 1MB | 0x4000_0000
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2023-06-05 11:58:59 +00:00
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U-Boot | 1MB | 0x4010_0000
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U-Boot Env | 1MB | 0x4020_0000
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2016-06-03 13:11:34 +00:00
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PPA FIT image | 2MB | 0x4050_0000
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Linux ITB | ~53MB | 0x40A0_0000
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