2019-10-11 15:33:54 +00:00
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include "meson-g12-common.dtsi"
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2020-03-05 11:12:38 +00:00
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#include <dt-bindings/clock/axg-audio-clkc.h>
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2019-10-11 15:33:54 +00:00
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#include <dt-bindings/power/meson-sm1-power.h>
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2020-03-05 11:12:38 +00:00
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#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
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#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
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2019-10-11 15:33:54 +00:00
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/ {
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compatible = "amlogic,sm1";
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2020-03-05 11:12:38 +00:00
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tdmif_a: audio-controller-0 {
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compatible = "amlogic,axg-tdm-iface";
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#sound-dai-cells = <0>;
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sound-name-prefix = "TDM_A";
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clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
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<&clkc_audio AUD_CLKID_MST_A_SCLK>,
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<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
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clock-names = "mclk", "sclk", "lrclk";
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status = "disabled";
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};
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tdmif_b: audio-controller-1 {
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compatible = "amlogic,axg-tdm-iface";
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#sound-dai-cells = <0>;
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sound-name-prefix = "TDM_B";
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clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
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<&clkc_audio AUD_CLKID_MST_B_SCLK>,
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<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
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clock-names = "mclk", "sclk", "lrclk";
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status = "disabled";
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};
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tdmif_c: audio-controller-2 {
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compatible = "amlogic,axg-tdm-iface";
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#sound-dai-cells = <0>;
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sound-name-prefix = "TDM_C";
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clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
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<&clkc_audio AUD_CLKID_MST_C_SCLK>,
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<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
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clock-names = "mclk", "sclk", "lrclk";
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status = "disabled";
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};
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2019-10-11 15:33:54 +00:00
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cpus {
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#address-cells = <0x2>;
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#size-cells = <0x0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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2020-04-24 02:58:30 +00:00
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#cooling-cells = <2>;
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2019-10-11 15:33:54 +00:00
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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2020-04-24 02:58:30 +00:00
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#cooling-cells = <2>;
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2019-10-11 15:33:54 +00:00
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x2>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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2020-04-24 02:58:30 +00:00
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#cooling-cells = <2>;
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2019-10-11 15:33:54 +00:00
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x3>;
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enable-method = "psci";
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next-level-cache = <&l2>;
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2020-04-24 02:58:30 +00:00
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#cooling-cells = <2>;
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2019-10-11 15:33:54 +00:00
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};
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l2: l2-cache0 {
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compatible = "cache";
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};
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};
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cpu_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-shared;
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opp-100000000 {
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opp-hz = /bits/ 64 <100000000>;
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opp-microvolt = <730000>;
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};
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opp-250000000 {
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opp-hz = /bits/ 64 <250000000>;
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opp-microvolt = <730000>;
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};
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opp-500000000 {
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opp-hz = /bits/ 64 <500000000>;
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opp-microvolt = <730000>;
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};
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opp-667000000 {
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opp-hz = /bits/ 64 <666666666>;
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opp-microvolt = <750000>;
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};
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opp-1000000000 {
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opp-hz = /bits/ 64 <1000000000>;
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opp-microvolt = <770000>;
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};
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opp-1200000000 {
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opp-hz = /bits/ 64 <1200000000>;
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opp-microvolt = <780000>;
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};
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opp-1404000000 {
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opp-hz = /bits/ 64 <1404000000>;
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opp-microvolt = <790000>;
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};
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opp-1512000000 {
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opp-hz = /bits/ 64 <1500000000>;
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opp-microvolt = <800000>;
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};
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opp-1608000000 {
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opp-hz = /bits/ 64 <1608000000>;
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opp-microvolt = <810000>;
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};
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opp-1704000000 {
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opp-hz = /bits/ 64 <1704000000>;
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opp-microvolt = <850000>;
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};
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opp-1800000000 {
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opp-hz = /bits/ 64 <1800000000>;
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opp-microvolt = <900000>;
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};
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opp-1908000000 {
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opp-hz = /bits/ 64 <1908000000>;
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opp-microvolt = <950000>;
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};
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};
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};
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2020-03-05 11:12:38 +00:00
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&apb {
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audio: bus@60000 {
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compatible = "simple-bus";
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reg = <0x0 0x60000 0x0 0x1000>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
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clkc_audio: clock-controller@0 {
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status = "disabled";
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compatible = "amlogic,sm1-audio-clkc";
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reg = <0x0 0x0 0x0 0xb4>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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clocks = <&clkc CLKID_AUDIO>,
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<&clkc CLKID_MPLL0>,
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<&clkc CLKID_MPLL1>,
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<&clkc CLKID_MPLL2>,
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<&clkc CLKID_MPLL3>,
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<&clkc CLKID_HIFI_PLL>,
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<&clkc CLKID_FCLK_DIV3>,
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV5>;
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clock-names = "pclk",
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"mst_in0",
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"mst_in1",
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"mst_in2",
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"mst_in3",
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"mst_in4",
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"mst_in5",
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"mst_in6",
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"mst_in7";
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resets = <&reset RESET_AUDIO>;
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};
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toddr_a: audio-controller@100 {
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compatible = "amlogic,sm1-toddr",
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"amlogic,axg-toddr";
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reg = <0x0 0x100 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "TODDR_A";
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interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
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resets = <&arb AXG_ARB_TODDR_A>,
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<&clkc_audio AUD_RESET_TODDR_A>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <8192>;
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status = "disabled";
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};
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toddr_b: audio-controller@140 {
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compatible = "amlogic,sm1-toddr",
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"amlogic,axg-toddr";
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reg = <0x0 0x140 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "TODDR_B";
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interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
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resets = <&arb AXG_ARB_TODDR_B>,
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<&clkc_audio AUD_RESET_TODDR_B>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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toddr_c: audio-controller@180 {
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compatible = "amlogic,sm1-toddr",
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"amlogic,axg-toddr";
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reg = <0x0 0x180 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "TODDR_C";
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interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
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resets = <&arb AXG_ARB_TODDR_C>,
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<&clkc_audio AUD_RESET_TODDR_C>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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frddr_a: audio-controller@1c0 {
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compatible = "amlogic,sm1-frddr",
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"amlogic,axg-frddr";
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reg = <0x0 0x1c0 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "FRDDR_A";
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interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
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resets = <&arb AXG_ARB_FRDDR_A>,
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<&clkc_audio AUD_RESET_FRDDR_A>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <512>;
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status = "disabled";
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};
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frddr_b: audio-controller@200 {
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compatible = "amlogic,sm1-frddr",
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"amlogic,axg-frddr";
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reg = <0x0 0x200 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "FRDDR_B";
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interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
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resets = <&arb AXG_ARB_FRDDR_B>,
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<&clkc_audio AUD_RESET_FRDDR_B>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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frddr_c: audio-controller@240 {
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compatible = "amlogic,sm1-frddr",
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"amlogic,axg-frddr";
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reg = <0x0 0x240 0x0 0x2c>;
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#sound-dai-cells = <0>;
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sound-name-prefix = "FRDDR_C";
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interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
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resets = <&arb AXG_ARB_FRDDR_C>,
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<&clkc_audio AUD_RESET_FRDDR_C>;
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reset-names = "arb", "rst";
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amlogic,fifo-depth = <256>;
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status = "disabled";
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};
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arb: reset-controller@280 {
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status = "disabled";
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compatible = "amlogic,meson-sm1-audio-arb";
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reg = <0x0 0x280 0x0 0x4>;
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#reset-cells = <1>;
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clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
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};
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tdmin_a: audio-controller@300 {
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compatible = "amlogic,sm1-tdmin",
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"amlogic,axg-tdmin";
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reg = <0x0 0x300 0x0 0x40>;
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sound-name-prefix = "TDMIN_A";
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resets = <&clkc_audio AUD_RESET_TDMIN_A>;
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clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
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<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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tdmin_b: audio-controller@340 {
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compatible = "amlogic,sm1-tdmin",
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"amlogic,axg-tdmin";
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reg = <0x0 0x340 0x0 0x40>;
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sound-name-prefix = "TDMIN_B";
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resets = <&clkc_audio AUD_RESET_TDMIN_B>;
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clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
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<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
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<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
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clock-names = "pclk", "sclk", "sclk_sel",
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"lrclk", "lrclk_sel";
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status = "disabled";
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};
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tdmin_c: audio-controller@380 {
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compatible = "amlogic,sm1-tdmin",
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"amlogic,axg-tdmin";
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reg = <0x0 0x380 0x0 0x40>;
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sound-name-prefix = "TDMIN_C";
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resets = <&clkc_audio AUD_RESET_TDMIN_C>;
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clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
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<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
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<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
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|
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
|
|
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
|
|
"lrclk", "lrclk_sel";
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
tdmin_lb: audio-controller@3c0 {
|
|
|
|
compatible = "amlogic,sm1-tdmin",
|
|
|
|
"amlogic,axg-tdmin";
|
|
|
|
reg = <0x0 0x3c0 0x0 0x40>;
|
|
|
|
sound-name-prefix = "TDMIN_LB";
|
|
|
|
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
|
|
|
|
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
|
|
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
|
|
"lrclk", "lrclk_sel";
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
tdmout_a: audio-controller@500 {
|
|
|
|
compatible = "amlogic,sm1-tdmout";
|
|
|
|
reg = <0x0 0x500 0x0 0x40>;
|
|
|
|
sound-name-prefix = "TDMOUT_A";
|
|
|
|
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
|
|
|
|
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
|
|
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
|
|
"lrclk", "lrclk_sel";
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
tdmout_b: audio-controller@540 {
|
|
|
|
compatible = "amlogic,sm1-tdmout";
|
|
|
|
reg = <0x0 0x540 0x0 0x40>;
|
|
|
|
sound-name-prefix = "TDMOUT_B";
|
|
|
|
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
|
|
|
|
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
|
|
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
|
|
"lrclk", "lrclk_sel";
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
tdmout_c: audio-controller@580 {
|
|
|
|
compatible = "amlogic,sm1-tdmout";
|
|
|
|
reg = <0x0 0x580 0x0 0x40>;
|
|
|
|
sound-name-prefix = "TDMOUT_C";
|
|
|
|
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
|
|
|
|
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
|
|
|
|
clock-names = "pclk", "sclk", "sclk_sel",
|
|
|
|
"lrclk", "lrclk_sel";
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
tohdmitx: audio-controller@744 {
|
|
|
|
compatible = "amlogic,sm1-tohdmitx",
|
|
|
|
"amlogic,g12a-tohdmitx";
|
|
|
|
reg = <0x0 0x744 0x0 0x4>;
|
|
|
|
#sound-dai-cells = <1>;
|
|
|
|
sound-name-prefix = "TOHDMITX";
|
|
|
|
resets = <&clkc_audio AUD_RESET_TOHDMITX>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
toddr_d: audio-controller@840 {
|
|
|
|
compatible = "amlogic,sm1-toddr",
|
|
|
|
"amlogic,axg-toddr";
|
|
|
|
reg = <0x0 0x840 0x0 0x2c>;
|
|
|
|
#sound-dai-cells = <0>;
|
|
|
|
sound-name-prefix = "TODDR_D";
|
|
|
|
interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
|
|
|
|
clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
|
|
|
|
resets = <&arb AXG_ARB_TODDR_D>,
|
|
|
|
<&clkc_audio AUD_RESET_TODDR_D>;
|
|
|
|
reset-names = "arb", "rst";
|
|
|
|
amlogic,fifo-depth = <256>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
frddr_d: audio-controller@880 {
|
|
|
|
compatible = "amlogic,sm1-frddr",
|
|
|
|
"amlogic,axg-frddr";
|
|
|
|
reg = <0x0 0x880 0x0 0x2c>;
|
|
|
|
#sound-dai-cells = <0>;
|
|
|
|
sound-name-prefix = "FRDDR_D";
|
|
|
|
interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
|
|
|
|
clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
|
|
|
|
resets = <&arb AXG_ARB_FRDDR_D>,
|
|
|
|
<&clkc_audio AUD_RESET_FRDDR_D>;
|
|
|
|
reset-names = "arb", "rst";
|
|
|
|
amlogic,fifo-depth = <256>;
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
pdm: audio-controller@61000 {
|
|
|
|
compatible = "amlogic,sm1-pdm",
|
|
|
|
"amlogic,axg-pdm";
|
|
|
|
reg = <0x0 0x61000 0x0 0x34>;
|
|
|
|
#sound-dai-cells = <0>;
|
|
|
|
sound-name-prefix = "PDM";
|
|
|
|
clocks = <&clkc_audio AUD_CLKID_PDM>,
|
|
|
|
<&clkc_audio AUD_CLKID_PDM_DCLK>,
|
|
|
|
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
|
|
|
|
clock-names = "pclk", "dclk", "sysclk";
|
2020-04-20 13:44:41 +00:00
|
|
|
resets = <&clkc_audio AUD_RESET_PDM>;
|
2020-03-05 11:12:38 +00:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2019-10-11 15:33:54 +00:00
|
|
|
&cecb_AO {
|
|
|
|
compatible = "amlogic,meson-sm1-ao-cec";
|
|
|
|
};
|
|
|
|
|
|
|
|
&clk_msr {
|
|
|
|
compatible = "amlogic,meson-sm1-clk-measure";
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
&clkc {
|
|
|
|
compatible = "amlogic,sm1-clkc";
|
|
|
|
};
|
|
|
|
|
2020-04-24 02:58:30 +00:00
|
|
|
&cpu_thermal {
|
|
|
|
cooling-maps {
|
|
|
|
map0 {
|
|
|
|
trip = <&cpu_passive>;
|
|
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
|
|
};
|
|
|
|
|
|
|
|
map1 {
|
|
|
|
trip = <&cpu_hot>;
|
|
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2019-10-11 15:33:54 +00:00
|
|
|
ðmac {
|
|
|
|
power-domains = <&pwrc PWRC_SM1_ETH_ID>;
|
|
|
|
};
|
|
|
|
|
2020-03-05 11:12:38 +00:00
|
|
|
&gpio_intc {
|
|
|
|
compatible = "amlogic,meson-sm1-gpio-intc",
|
|
|
|
"amlogic,meson-gpio-intc";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie {
|
|
|
|
power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
|
|
|
|
};
|
|
|
|
|
2019-10-11 15:33:54 +00:00
|
|
|
&pwrc {
|
|
|
|
compatible = "amlogic,meson-sm1-pwrc";
|
|
|
|
};
|
|
|
|
|
2020-03-05 11:12:38 +00:00
|
|
|
&simplefb_cvbs {
|
|
|
|
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&simplefb_hdmi {
|
|
|
|
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&vdec {
|
|
|
|
compatible = "amlogic,sm1-vdec";
|
|
|
|
};
|
|
|
|
|
2019-10-11 15:33:54 +00:00
|
|
|
&vpu {
|
|
|
|
power-domains = <&pwrc PWRC_SM1_VPU_ID>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb {
|
|
|
|
power-domains = <&pwrc PWRC_SM1_USB_ID>;
|
|
|
|
};
|