u-boot/board/freescale/t102xrdb/t1024_nand_rcw.cfg

#PBL preamble and RCW header for T1024RDB
aa55aa55 010e0100
#SerDes Protocol: 0x95
#Core/DDR: 1400Mhz/1600MT/s with single source clock
0810000c 00000000 00000000 00000000
4a800003 80000012 ec027000 21000000
00000000 00000000 00000000 00030810
00000000 0b005a08 00000000 00000006
powerpc/t1024rdb: Add T1024 RDB board support T1024RDB is a Freescale Reference Design Board that hosts the T1024 SoC. T1024RDB board Overview ----------------------- - T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - 32-/64-bit DDR3L SDRAM memory controller with ECC and interleaving support - Accelerator: DPAA components consist of FMan, BMan, QMan, DCE and SEC - Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - one 10Gbps XFI interface - PCIe: Three PCIe controllers: one PCIe Slot and two Mini-PCIe connectors. - SerDes: 4 lanes up to 10.3125GHz - IFC: 128MB NOR Flash, 512MB NAND Flash and CPLD - eSPI: 64MB N25Q512 SPI flash. - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) - USB: Two Type-A USB2.0 ports with internal PHY - eSDHC: Support SD, SDHC, SDXC and MMC/eMMC - I2C: Four I2C controllers - UART: Two UART serial ports Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: Fix ft_board_setup() type, fix MAINTAINERS for SECURE_BOOT Fix Kconfig by adding SUPPORT_SPL] Reviewed-by: York Sun <yorksun@freescale.com> 2014-11-24 09:11:56 +00:00			`#PBL preamble and RCW header for T1024RDB`
			`aa55aa55 010e0100`
			`#SerDes Protocol: 0x95`
			`#Core/DDR: 1400Mhz/1600MT/s with single source clock`
			`0810000c 00000000 00000000 00000000`
			`4a800003 80000012 ec027000 21000000`
			`00000000 00000000 00000000 00030810`
			`00000000 0b005a08 00000000 00000006`