2015-05-03 21:10:34 +00:00
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/dts-v1/;
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/ {
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model = "ST STV0991 application board";
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compatible = "st,stv0991";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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stdout-path = &uart0;
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};
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memory {
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device_type="memory";
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reg = <0x0 0x198000>;
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};
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uart0: serial@0x80406000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x80406000 0x1000>;
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clock = <2700000>;
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};
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2015-07-03 01:29:42 +00:00
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aliases {
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spi0 = "/spi@80203000"; /* QSPI */
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};
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qspi: spi@80203000 {
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compatible = "cadence,qspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x80203000 0x100>,
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<0x40000000 0x1000000>;
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clocks = <3750000>;
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2018-01-23 23:13:10 +00:00
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x40000000>;
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2015-07-03 01:29:42 +00:00
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status = "okay";
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flash0: n25q32@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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reg = <0>; /* chip select */
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spi-max-frequency = <50000000>;
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m25p,fast-read;
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page-size = <256>;
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block-size = <16>; /* 2^16, 64KB */
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2018-01-23 23:13:10 +00:00
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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2015-07-03 01:29:42 +00:00
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};
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};
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2015-05-03 21:10:34 +00:00
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};
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