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https://github.com/AsahiLinux/u-boot
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159 lines
3.2 KiB
C
159 lines
3.2 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2022 StarFive Technology Co., Ltd.
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* Author: Yanhong Wang <yanhong.wang@starfivetech.com>
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*
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/ofnode.h>
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#include <dt-bindings/reset/starfive,jh7110-crg.h>
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#include <errno.h>
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#include <linux/iopoll.h>
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#include <reset-uclass.h>
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struct jh7110_reset_priv {
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void __iomem *reg;
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u32 assert;
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u32 status;
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u32 resets;
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};
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struct reset_info {
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const char *compat;
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const u32 nr_resets;
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const u32 assert_offset;
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const u32 status_offset;
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};
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static const struct reset_info jh7110_rst_info[] = {
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{
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.compat = "starfive,jh7110-syscrg",
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.nr_resets = JH7110_SYSRST_END,
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.assert_offset = 0x2F8,
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.status_offset = 0x308,
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},
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{
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.compat = "starfive,jh7110-aoncrg",
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.nr_resets = JH7110_AONRST_END,
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.assert_offset = 0x38,
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.status_offset = 0x3C,
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},
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{
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.compat = "starfive,jh7110-stgcrg",
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.nr_resets = JH7110_STGRST_END,
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.assert_offset = 0x74,
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.status_offset = 0x78,
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}
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};
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static const struct reset_info *jh7110_reset_get_cfg(const char *compat)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(jh7110_rst_info); i++)
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if (!strcmp(compat, jh7110_rst_info[i].compat))
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return &jh7110_rst_info[i];
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return NULL;
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}
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static int jh7110_reset_trigger(struct jh7110_reset_priv *priv,
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unsigned long id, bool assert)
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{
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ulong group;
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u32 mask, value, done = 0;
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ulong addr;
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group = id / 32;
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mask = BIT(id % 32);
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if (!assert)
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done ^= mask;
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addr = (ulong)priv->reg + priv->assert + group * sizeof(u32);
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value = readl((ulong *)addr);
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if (assert)
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value |= mask;
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else
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value &= ~mask;
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writel(value, (ulong *)addr);
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addr = (ulong)priv->reg + priv->status + group * sizeof(u32);
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return readl_poll_timeout((ulong *)addr, value,
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(value & mask) == done, 1000);
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}
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static int jh7110_reset_assert(struct reset_ctl *rst)
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{
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struct jh7110_reset_priv *priv = dev_get_priv(rst->dev);
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jh7110_reset_trigger(priv, rst->id, true);
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return 0;
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}
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static int jh7110_reset_deassert(struct reset_ctl *rst)
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{
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struct jh7110_reset_priv *priv = dev_get_priv(rst->dev);
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jh7110_reset_trigger(priv, rst->id, false);
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return 0;
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}
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static int jh7110_reset_free(struct reset_ctl *rst)
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{
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return 0;
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}
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static int jh7110_reset_request(struct reset_ctl *rst)
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{
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struct jh7110_reset_priv *priv = dev_get_priv(rst->dev);
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if (rst->id >= priv->resets)
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return -EINVAL;
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return 0;
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}
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static int jh7110_reset_probe(struct udevice *dev)
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{
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struct jh7110_reset_priv *priv = dev_get_priv(dev);
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const struct reset_info *cfg;
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const char *compat;
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compat = ofnode_get_property(dev_ofnode(dev), "compatible", NULL);
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if (!compat)
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return -EINVAL;
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cfg = jh7110_reset_get_cfg(compat);
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if (!cfg)
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return -EINVAL;
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priv->assert = cfg->assert_offset;
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priv->status = cfg->status_offset;
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priv->resets = cfg->nr_resets;
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priv->reg = (void __iomem *)dev_read_addr_index(dev, 0);
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return 0;
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}
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const struct reset_ops jh7110_reset_reset_ops = {
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.rfree = jh7110_reset_free,
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.request = jh7110_reset_request,
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.rst_assert = jh7110_reset_assert,
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.rst_deassert = jh7110_reset_deassert,
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};
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U_BOOT_DRIVER(jh7110_reset) = {
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.name = "jh7110_reset",
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.id = UCLASS_RESET,
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.ops = &jh7110_reset_reset_ops,
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.probe = jh7110_reset_probe,
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.priv_auto = sizeof(struct jh7110_reset_priv),
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};
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