u-boot/include/dt-bindings/clock/microchip,clock.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (c) 2015 Purna Chandra Mandal <purna.mandal@microchip.com>
 *
 */

#ifndef __CLK_MICROCHIP_PIC32
#define __CLK_MICROCHIP_PIC32

/* clock output indices */
#define BASECLK	0
#define PLLCLK	1
#define MPLL	2
#define SYSCLK	3
#define PB1CLK	4
#define PB2CLK	5
#define PB3CLK	6
#define PB4CLK	7
#define PB5CLK	8
#define PB6CLK	9
#define PB7CLK	10
#define REF1CLK	11
#define REF2CLK	12
#define REF3CLK	13
#define REF4CLK	14
#define REF5CLK	15

#endif	/* __CLK_MICROCHIP_PIC32 */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
drivers: clk: Add clock driver for Microchip PIC32 Microcontroller. PIC32 clock module consists of multiple oscillators, PLLs, mutiplexers and dividers capable of supplying clock to various controllers on or off-chip. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 2016-01-28 10:00:11 +00:00			`/*`
			`* (c) 2015 Purna Chandra Mandal <purna.mandal@microchip.com>`
			`*`
			`*/`

			`#ifndef __CLK_MICROCHIP_PIC32`
			`#define __CLK_MICROCHIP_PIC32`

			`/* clock output indices */`
			`#define BASECLK 0`
			`#define PLLCLK 1`
			`#define MPLL 2`
			`#define SYSCLK 3`
			`#define PB1CLK 4`
			`#define PB2CLK 5`
			`#define PB3CLK 6`
			`#define PB4CLK 7`
			`#define PB5CLK 8`
			`#define PB6CLK 9`
			`#define PB7CLK 10`
			`#define REF1CLK 11`
			`#define REF2CLK 12`
			`#define REF3CLK 13`
			`#define REF4CLK 14`
			`#define REF5CLK 15`

			`#endif /* __CLK_MICROCHIP_PIC32 */`