u-boot/drivers/phy/marvell/sata.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2015-2016 Marvell International Ltd.
 */

#ifndef _SATA_H_
#define _SATA_H_

/* SATA3 Unit address */
#define SATA3_VENDOR_ADDRESS		0xA0
#define SATA3_VENDOR_ADDR_OFSSET	0
#define SATA3_VENDOR_ADDR_MASK		(0xFFFFFFFF << SATA3_VENDOR_ADDR_OFSSET)
#define SATA3_VENDOR_DATA		0xA4

#define SATA_CONTROL_REG		0x0
#define SATA3_CTRL_SATA0_PD_OFFSET	6
#define SATA3_CTRL_SATA0_PD_MASK	(1 << SATA3_CTRL_SATA0_PD_OFFSET)
#define SATA3_CTRL_SATA1_PD_OFFSET	14
#define SATA3_CTRL_SATA1_PD_MASK	(1 << SATA3_CTRL_SATA1_PD_OFFSET)
#define SATA3_CTRL_SATA1_ENABLE_OFFSET	22
#define SATA3_CTRL_SATA1_ENABLE_MASK	(1 << SATA3_CTRL_SATA1_ENABLE_OFFSET)
#define SATA3_CTRL_SATA_SSU_OFFSET	23
#define SATA3_CTRL_SATA_SSU_MASK	(1 << SATA3_CTRL_SATA_SSU_OFFSET)

#define SATA_MBUS_SIZE_SELECT_REG	0x4
#define SATA_MBUS_REGRET_EN_OFFSET	7
#define SATA_MBUS_REGRET_EN_MASK	(0x1 << SATA_MBUS_REGRET_EN_OFFSET)

#endif /* _SATA_H_ */
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 7K/8K This version is based on the Marvell U-Boot version with this patch applied as latest patch: Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb device mode" from 2016-07-05. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> 2016-08-30 14:48:20 +00:00			`/*`
			`* Copyright (C) 2015-2016 Marvell International Ltd.`
			`*/`

			`#ifndef _SATA_H_`
			`#define _SATA_H_`

			`/* SATA3 Unit address */`
			`#define SATA3_VENDOR_ADDRESS 0xA0`
			`#define SATA3_VENDOR_ADDR_OFSSET 0`
			`#define SATA3_VENDOR_ADDR_MASK (0xFFFFFFFF << SATA3_VENDOR_ADDR_OFSSET)`
			`#define SATA3_VENDOR_DATA 0xA4`

			`#define SATA_CONTROL_REG 0x0`
			`#define SATA3_CTRL_SATA0_PD_OFFSET 6`
			`#define SATA3_CTRL_SATA0_PD_MASK (1 << SATA3_CTRL_SATA0_PD_OFFSET)`
			`#define SATA3_CTRL_SATA1_PD_OFFSET 14`
			`#define SATA3_CTRL_SATA1_PD_MASK (1 << SATA3_CTRL_SATA1_PD_OFFSET)`
			`#define SATA3_CTRL_SATA1_ENABLE_OFFSET 22`
			`#define SATA3_CTRL_SATA1_ENABLE_MASK (1 << SATA3_CTRL_SATA1_ENABLE_OFFSET)`
			`#define SATA3_CTRL_SATA_SSU_OFFSET 23`
			`#define SATA3_CTRL_SATA_SSU_MASK (1 << SATA3_CTRL_SATA_SSU_OFFSET)`

			`#define SATA_MBUS_SIZE_SELECT_REG 0x4`
			`#define SATA_MBUS_REGRET_EN_OFFSET 7`
			`#define SATA_MBUS_REGRET_EN_MASK (0x1 << SATA_MBUS_REGRET_EN_OFFSET)`

			`#endif /* _SATA_H_ */`