u-boot/include/dt-bindings/power/tegra186-powergate.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2015-2016, NVIDIA CORPORATION.
 */

#ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H

#define TEGRA186_POWER_DOMAIN_AUD	0
#define TEGRA186_POWER_DOMAIN_DFD	1
#define TEGRA186_POWER_DOMAIN_DISP	2
#define TEGRA186_POWER_DOMAIN_DISPB	3
#define TEGRA186_POWER_DOMAIN_DISPC	4
#define TEGRA186_POWER_DOMAIN_ISPA	5
#define TEGRA186_POWER_DOMAIN_NVDEC	6
#define TEGRA186_POWER_DOMAIN_NVJPG	7
#define TEGRA186_POWER_DOMAIN_MPE	8
#define TEGRA186_POWER_DOMAIN_PCX	9
#define TEGRA186_POWER_DOMAIN_SAX	10
#define TEGRA186_POWER_DOMAIN_VE	11
#define TEGRA186_POWER_DOMAIN_VIC	12
#define TEGRA186_POWER_DOMAIN_XUSBA	13
#define TEGRA186_POWER_DOMAIN_XUSBB	14
#define TEGRA186_POWER_DOMAIN_XUSBC	15
#define TEGRA186_POWER_DOMAIN_GPU	43
#define TEGRA186_POWER_DOMAIN_MAX	44

#endif
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`/* SPDX-License-Identifier: GPL-2.0 */`
ARM: tegra: add BPMP DT bindings The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 2016-07-27 21:24:50 +00:00			`/*`
			`* Copyright (c) 2015-2016, NVIDIA CORPORATION.`
			`*/`

			`#ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H`
			`#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H`

			`#define TEGRA186_POWER_DOMAIN_AUD 0`
			`#define TEGRA186_POWER_DOMAIN_DFD 1`
			`#define TEGRA186_POWER_DOMAIN_DISP 2`
			`#define TEGRA186_POWER_DOMAIN_DISPB 3`
			`#define TEGRA186_POWER_DOMAIN_DISPC 4`
			`#define TEGRA186_POWER_DOMAIN_ISPA 5`
			`#define TEGRA186_POWER_DOMAIN_NVDEC 6`
			`#define TEGRA186_POWER_DOMAIN_NVJPG 7`
			`#define TEGRA186_POWER_DOMAIN_MPE 8`
			`#define TEGRA186_POWER_DOMAIN_PCX 9`
			`#define TEGRA186_POWER_DOMAIN_SAX 10`
			`#define TEGRA186_POWER_DOMAIN_VE 11`
			`#define TEGRA186_POWER_DOMAIN_VIC 12`
			`#define TEGRA186_POWER_DOMAIN_XUSBA 13`
			`#define TEGRA186_POWER_DOMAIN_XUSBB 14`
			`#define TEGRA186_POWER_DOMAIN_XUSBC 15`
			`#define TEGRA186_POWER_DOMAIN_GPU 43`
			`#define TEGRA186_POWER_DOMAIN_MAX 44`

			`#endif`