2018-05-06 21:58:06 +00:00
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/* SPDX-License-Identifier: GPL-2.0+ */
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2010-07-09 06:13:48 +00:00
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/*
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* am35x.h - TI's AM35x platform specific usb wrapper definitions.
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*
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* Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
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*
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* Based on drivers/usb/musb/da8xx.h
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*
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* Copyright (c) 2010 Texas Instruments Incorporated
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*/
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#ifndef __AM35X_USB_H__
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#define __AM35X_USB_H__
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#include <asm/arch/am35x_def.h>
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#include "musb_core.h"
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/* Base address of musb wrapper */
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#define AM35X_USB_OTG_BASE 0x5C040000
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/* Base address of musb core */
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#define AM35X_USB_OTG_CORE_BASE (AM35X_USB_OTG_BASE + 0x400)
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/* Timeout for AM35x usb module */
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#define AM35X_USB_OTG_TIMEOUT 0x3FFFFFF
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/*
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* AM35x platform USB wrapper register overlay.
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*/
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struct am35x_usb_regs {
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u32 revision;
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u32 control;
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u32 status;
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u32 emulation;
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u32 reserved0[1];
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u32 autoreq;
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u32 srpfixtime;
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u32 ep_intsrc;
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u32 ep_intsrcset;
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u32 ep_intsrcclr;
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u32 ep_intmsk;
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u32 ep_intmskset;
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u32 ep_intmskclr;
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u32 ep_intsrcmsked;
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u32 reserved1[1];
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u32 core_intsrc;
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u32 core_intsrcset;
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u32 core_intsrcclr;
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u32 core_intmsk;
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u32 core_intmskset;
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u32 core_intmskclr;
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u32 core_intsrcmsked;
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u32 reserved2[1];
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u32 eoi;
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u32 mop_sop_en;
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u32 reserved3[2];
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u32 txmode;
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u32 rxmode;
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u32 epcount_mode;
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};
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#define am35x_usb_regs ((struct am35x_usb_regs *)AM35X_USB_OTG_BASE)
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/* USB 2.0 PHY Control */
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#define DEVCONF2_PHY_GPIOMODE (1 << 23)
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#define DEVCONF2_OTGMODE (3 << 14)
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#define DEVCONF2_SESENDEN (1 << 13) /* Vsess_end comparator */
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#define DEVCONF2_VBDTCTEN (1 << 12) /* Vbus comparator */
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#define DEVCONF2_REFFREQ_24MHZ (2 << 8)
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#define DEVCONF2_REFFREQ_26MHZ (7 << 8)
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#define DEVCONF2_REFFREQ_13MHZ (6 << 8)
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#define DEVCONF2_REFFREQ (0xf << 8)
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#define DEVCONF2_PHYCKGD (1 << 7)
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#define DEVCONF2_VBUSSENSE (1 << 6)
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#define DEVCONF2_PHY_PLLON (1 << 5) /* override PLL suspend */
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#define DEVCONF2_RESET (1 << 4)
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#define DEVCONF2_PHYPWRDN (1 << 3)
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#define DEVCONF2_OTGPWRDN (1 << 2)
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#define DEVCONF2_DATPOL (1 << 1)
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#endif /* __AM35X_USB_H__ */
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