2012-05-23 07:46:15 +00:00
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/dts-v1/;
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2016-05-08 22:55:19 +00:00
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#include <dt-bindings/input/input.h>
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2013-02-21 12:31:27 +00:00
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#include "tegra20.dtsi"
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2012-05-23 07:46:15 +00:00
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/ {
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2012-08-31 08:30:00 +00:00
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model = "NVIDIA Tegra20 Ventana evaluation board";
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2012-05-23 07:46:15 +00:00
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compatible = "nvidia,ventana", "nvidia,tegra20";
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2014-09-04 22:27:35 +00:00
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chosen {
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stdout-path = &uartd;
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};
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2012-05-23 07:46:15 +00:00
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aliases {
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2016-05-08 22:55:19 +00:00
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rtc0 = "/i2c@7000d000/tps6586x@34";
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rtc1 = "/rtc@7000e000";
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serial0 = &uartd;
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ARM: tegra: fix USB controller aliases
Some boards have a different set of USB controllers enabled in DT than
the set referenced by /alias entries. This patch fixes that. For
example, this avoids the following message while booting on Ventana,
which is caused by the fact that the USB0 controller had no alias, and
defaulted to wanting a sequence number of 0, which was later explicitly
requested by the alias for USB controller 2.
USB2: Device 'usb@c5008000': seq 0 is in use by 'usb@c5000000'
This didn't affect USB operation in any way though.
Related, there's no need for the USB controller aliases to have an order
that's different from the HW order, so re-order any aliases to match the
HW ordering. This has the benefit that since USB controller 0 is the only
one that supports device-mode in HW, and U-Boot only supports enabling
device move on controller 0, there's now good synergy in the ordering! For
Tegra20, that's not relevant at present since USB device mode doesn't work
correctly on that SoC, but it will save some head-scratching later.
This patch doesn't fix the colibri_t20 board, even though it has the same
issue, since Marcel already sent a patch for that.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Harmony and Ventana
2016-09-15 18:19:38 +00:00
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usb0 = "/usb@c5000000";
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usb1 = "/usb@c5004000";
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usb2 = "/usb@c5008000";
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2016-09-13 16:45:43 +00:00
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mmc0 = "/sdhci@c8000600";
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mmc1 = "/sdhci@c8000400";
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2012-05-23 07:46:15 +00:00
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};
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memory {
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reg = <0x00000000 0x40000000>;
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};
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2016-01-30 23:37:52 +00:00
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host1x@50000000 {
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2013-06-18 15:46:52 +00:00
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status = "okay";
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dc@54200000 {
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status = "okay";
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rgb {
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status = "okay";
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2016-05-08 22:55:20 +00:00
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nvidia,panel = <&panel>;
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display-timings {
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timing@0 {
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/* Seaboard has 1366x768 */
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clock-frequency = <70600000>;
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hactive = <1366>;
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vactive = <768>;
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hback-porch = <58>;
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hfront-porch = <58>;
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hsync-len = <58>;
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vback-porch = <4>;
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vfront-porch = <4>;
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vsync-len = <4>;
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hsync-active = <1>;
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};
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};
|
2013-06-18 15:46:52 +00:00
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};
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};
|
2016-05-08 22:55:19 +00:00
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hdmi@54280000 {
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status = "okay";
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vdd-supply = <&hdmi_vdd_reg>;
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pll-supply = <&hdmi_pll_reg>;
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nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
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GPIO_ACTIVE_HIGH>;
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};
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};
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pinmux@70000014 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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ata {
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nvidia,pins = "ata";
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nvidia,function = "ide";
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};
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atb {
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nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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};
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atc {
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nvidia,pins = "atc";
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nvidia,function = "nand";
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};
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atd {
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nvidia,pins = "atd", "ate", "gmb", "spia",
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"spib", "spic";
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nvidia,function = "gmi";
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};
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cdev1 {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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nvidia,pins = "cdev2";
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nvidia,function = "pllp_out4";
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};
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crtp {
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nvidia,pins = "crtp", "lm1";
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nvidia,function = "crt";
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};
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csus {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
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nvidia,function = "vi";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gmc {
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nvidia,pins = "gmc";
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nvidia,function = "uartd";
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};
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gmd {
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nvidia,pins = "gmd";
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nvidia,function = "sflash";
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};
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gpu {
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nvidia,pins = "gpu";
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nvidia,function = "pwm";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv", "slxa", "slxk";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint";
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uartb";
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};
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kbca {
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nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
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"kbce", "kbcf";
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nvidia,function = "kbc";
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};
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lcsn {
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nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
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"lsdi", "lvp0";
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nvidia,function = "rsvd4";
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};
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ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldi", "lhp0",
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"lhp1", "lhp2", "lhs", "lpp", "lpw0",
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"lpw2", "lsc0", "lsc1", "lsck", "lsda",
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"lspi", "lvp1", "lvs";
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nvidia,function = "displaya";
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};
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owc {
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nvidia,pins = "owc", "spdi", "spdo", "uac";
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nvidia,function = "rsvd2";
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdb {
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nvidia,pins = "sdb", "sdc", "sdd", "slxc";
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nvidia,function = "sdio3";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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slxd {
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nvidia,pins = "slxd";
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nvidia,function = "spdif";
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};
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spid {
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nvidia,pins = "spid", "spie", "spif";
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nvidia,function = "spi1";
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};
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spig {
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nvidia,pins = "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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uaa {
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nvidia,pins = "uaa", "uab", "uda";
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nvidia,function = "ulpi";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
|
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "atd",
|
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|
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"cdev1", "cdev2", "dap1", "dap2",
|
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"dap4", "ddc", "dtf", "gma", "gmc",
|
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"gme", "gpu", "gpu7", "i2cp", "irrx",
|
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"irtx", "pta", "rm", "sdc", "sdd",
|
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"slxc", "slxd", "slxk", "spdi", "spdo",
|
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"uac", "uad", "uca", "ucb", "uda";
|
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
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|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_ate {
|
|
|
|
|
nvidia,pins = "ate", "csus", "dap3", "gmd",
|
|
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|
|
"gpv", "owc", "spia", "spib", "spic",
|
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|
|
"spid", "spie", "spig";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
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|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_ck32 {
|
|
|
|
|
nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
|
|
|
|
|
"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
|
|
|
};
|
|
|
|
|
conf_crtp {
|
|
|
|
|
nvidia,pins = "crtp", "gmb", "slxa", "spih";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_dta {
|
|
|
|
|
nvidia,pins = "dta", "dtb", "dtc", "dtd";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_dte {
|
|
|
|
|
nvidia,pins = "dte", "spif";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_hdint {
|
|
|
|
|
nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
|
|
|
|
|
"lpw1", "lsck", "lsda", "lsdi", "lvp0";
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_kbca {
|
|
|
|
|
nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
|
|
|
|
|
"kbce", "kbcf", "sdio1", "uaa", "uab";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_lc {
|
|
|
|
|
nvidia,pins = "lc", "ls";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
|
|
|
};
|
|
|
|
|
conf_ld0 {
|
|
|
|
|
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
|
|
|
|
|
"ld5", "ld6", "ld7", "ld8", "ld9",
|
|
|
|
|
"ld10", "ld11", "ld12", "ld13", "ld14",
|
|
|
|
|
"ld15", "ld16", "ld17", "ldi", "lhp0",
|
|
|
|
|
"lhp1", "lhp2", "lhs", "lm0", "lpp",
|
|
|
|
|
"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
|
|
|
|
|
"lvp1", "lvs", "pmc", "sdb";
|
|
|
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
};
|
|
|
|
|
conf_ld17_0 {
|
|
|
|
|
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
|
|
|
|
|
"ld23_22";
|
|
|
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
|
|
|
};
|
|
|
|
|
drive_sdio1 {
|
|
|
|
|
nvidia,pins = "drive_sdio1";
|
|
|
|
|
nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
|
|
|
nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
|
|
|
nvidia,pull-down-strength = <31>;
|
|
|
|
|
nvidia,pull-up-strength = <31>;
|
|
|
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
|
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
state_i2cmux_ddc: pinmux_i2cmux_ddc {
|
|
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "i2c2";
|
|
|
|
|
};
|
|
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
state_i2cmux_pta: pinmux_i2cmux_pta {
|
|
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
|
|
|
|
nvidia,function = "i2c2";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
state_i2cmux_idle: pinmux_i2cmux_idle {
|
|
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2s@70002800 {
|
|
|
|
|
status = "okay";
|
2013-06-18 15:46:52 +00:00
|
|
|
};
|
|
|
|
|
|
2012-05-23 07:46:15 +00:00
|
|
|
serial@70006300 {
|
2016-05-08 22:55:19 +00:00
|
|
|
status = "okay";
|
|
|
|
|
clock-frequency = < 216000000 >; };
|
|
|
|
|
|
|
|
|
|
pwm: pwm@7000a000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000c000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
|
|
wm8903: wm8903@1a {
|
|
|
|
|
compatible = "wlf,wm8903";
|
|
|
|
|
reg = <0x1a>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
|
|
|
|
micdet-cfg = <0>;
|
|
|
|
|
micdet-delay = <100>;
|
|
|
|
|
gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* ALS and proximity sensor */
|
|
|
|
|
isl29018@44 {
|
|
|
|
|
compatible = "isil,isl29018";
|
|
|
|
|
reg = <0x44>;
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000c400 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2cmux {
|
|
|
|
|
compatible = "i2c-mux-pinctrl";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
i2c-parent = <&{/i2c@7000c400}>;
|
|
|
|
|
|
|
|
|
|
pinctrl-names = "ddc", "pta", "idle";
|
|
|
|
|
pinctrl-0 = <&state_i2cmux_ddc>;
|
|
|
|
|
pinctrl-1 = <&state_i2cmux_pta>;
|
|
|
|
|
pinctrl-2 = <&state_i2cmux_idle>;
|
|
|
|
|
|
|
|
|
|
hdmi_ddc: i2c@0 {
|
|
|
|
|
reg = <0>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
lvds_ddc: i2c@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000c500 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000d000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
|
|
|
|
|
pmic: tps6586x@34 {
|
|
|
|
|
compatible = "ti,tps6586x";
|
|
|
|
|
reg = <0x34>;
|
|
|
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
|
|
|
|
|
ti,system-power-controller;
|
|
|
|
|
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
|
|
|
|
|
sys-supply = <&vdd_5v0_reg>;
|
|
|
|
|
vin-sm0-supply = <&sys_reg>;
|
|
|
|
|
vin-sm1-supply = <&sys_reg>;
|
|
|
|
|
vin-sm2-supply = <&sys_reg>;
|
|
|
|
|
vinldo01-supply = <&sm2_reg>;
|
|
|
|
|
vinldo23-supply = <&sm2_reg>;
|
|
|
|
|
vinldo4-supply = <&sm2_reg>;
|
|
|
|
|
vinldo678-supply = <&sm2_reg>;
|
|
|
|
|
vinldo9-supply = <&sm2_reg>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
|
sys_reg: sys {
|
|
|
|
|
regulator-name = "vdd_sys";
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sm0 {
|
|
|
|
|
regulator-name = "vdd_sm0,vdd_core";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sm1 {
|
|
|
|
|
regulator-name = "vdd_sm1,vdd_cpu";
|
|
|
|
|
regulator-min-microvolt = <1000000>;
|
|
|
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sm2_reg: sm2 {
|
|
|
|
|
regulator-name = "vdd_sm2,vin_ldo*";
|
|
|
|
|
regulator-min-microvolt = <3700000>;
|
|
|
|
|
regulator-max-microvolt = <3700000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* LDO0 is not connected to anything */
|
|
|
|
|
|
|
|
|
|
ldo1 {
|
|
|
|
|
regulator-name = "vdd_ldo1,avdd_pll*";
|
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo2 {
|
|
|
|
|
regulator-name = "vdd_ldo2,vdd_rtc";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo3 {
|
|
|
|
|
regulator-name = "vdd_ldo3,avdd_usb*";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo4 {
|
|
|
|
|
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo5 {
|
|
|
|
|
regulator-name = "vdd_ldo5,vcore_mmc";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo6 {
|
|
|
|
|
regulator-name = "vdd_ldo6,avdd_vdac";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
hdmi_vdd_reg: ldo7 {
|
|
|
|
|
regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
hdmi_pll_reg: ldo8 {
|
|
|
|
|
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo9 {
|
|
|
|
|
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo_rtc {
|
|
|
|
|
regulator-name = "vdd_rtc_out,vdd_cell";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
temperature-sensor@4c {
|
|
|
|
|
compatible = "onnn,nct1008";
|
|
|
|
|
reg = <0x4c>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pmc@7000e400 {
|
|
|
|
|
nvidia,invert-interrupt;
|
|
|
|
|
nvidia,suspend-mode = <1>;
|
|
|
|
|
nvidia,cpu-pwr-good-time = <2000>;
|
|
|
|
|
nvidia,cpu-pwr-off-time = <100>;
|
|
|
|
|
nvidia,core-pwr-good-time = <3845 3845>;
|
|
|
|
|
nvidia,core-pwr-off-time = <458>;
|
|
|
|
|
nvidia,sys-clock-req-active-high;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb-phy@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb@c5004000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
|
|
|
|
|
GPIO_ACTIVE_LOW>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb-phy@c5004000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
|
|
|
|
|
GPIO_ACTIVE_LOW>;
|
2012-05-23 07:46:15 +00:00
|
|
|
};
|
|
|
|
|
|
2016-01-30 23:37:52 +00:00
|
|
|
usb@c5008000 {
|
|
|
|
|
status = "okay";
|
2012-05-23 07:46:15 +00:00
|
|
|
};
|
2013-02-21 12:31:29 +00:00
|
|
|
|
2016-05-08 22:55:19 +00:00
|
|
|
usb-phy@c5008000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@c8000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
keep-power-in-suspend;
|
|
|
|
|
};
|
|
|
|
|
|
2013-02-21 12:31:29 +00:00
|
|
|
sdhci@c8000400 {
|
|
|
|
|
status = "okay";
|
2015-01-06 03:05:41 +00:00
|
|
|
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
|
|
|
|
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
|
2013-02-21 12:31:29 +00:00
|
|
|
bus-width = <4>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@c8000600 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
bus-width = <8>;
|
2016-05-08 22:55:19 +00:00
|
|
|
non-removable;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
backlight: backlight {
|
|
|
|
|
compatible = "pwm-backlight";
|
|
|
|
|
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
power-supply = <&vdd_bl_reg>;
|
|
|
|
|
pwms = <&pwm 2 5000000>;
|
|
|
|
|
|
|
|
|
|
brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
|
|
|
default-brightness-level = <6>;
|
2013-02-21 12:31:29 +00:00
|
|
|
};
|
2013-06-18 15:46:52 +00:00
|
|
|
|
2016-01-30 23:37:52 +00:00
|
|
|
clocks {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
clk32k_in: clock@0 {
|
|
|
|
|
compatible = "fixed-clock";
|
|
|
|
|
reg=<0>;
|
|
|
|
|
#clock-cells = <0>;
|
|
|
|
|
clock-frequency = <32768>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2016-05-08 22:55:19 +00:00
|
|
|
gpio-keys {
|
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
|
|
power {
|
|
|
|
|
label = "Power";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
|
|
|
|
|
linux,code = <KEY_POWER>;
|
|
|
|
|
gpio-key,wakeup;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2016-05-08 22:55:20 +00:00
|
|
|
panel: panel {
|
|
|
|
|
compatible = "chunghwa,claa101wa01a", "simple-panel";
|
|
|
|
|
|
|
|
|
|
power-supply = <&vdd_pnl_reg>;
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
|
|
|
|
|
backlight = <&backlight>;
|
|
|
|
|
ddc-i2c-bus = <&lvds_ddc>;
|
|
|
|
|
};
|
|
|
|
|
|
2016-05-08 22:55:19 +00:00
|
|
|
regulators {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
vdd_5v0_reg: regulator@0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-name = "vdd_5v0";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-name = "vdd_1v5";
|
|
|
|
|
regulator-min-microvolt = <1500000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
|
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <2>;
|
|
|
|
|
regulator-name = "vdd_1v2";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_pnl_reg: regulator@3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <3>;
|
|
|
|
|
regulator-name = "vdd_pnl";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_bl_reg: regulator@4 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <4>;
|
|
|
|
|
regulator-name = "vdd_bl";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
2016-01-30 23:38:01 +00:00
|
|
|
};
|
|
|
|
|
|
2016-05-08 22:55:19 +00:00
|
|
|
sound {
|
|
|
|
|
compatible = "nvidia,tegra-audio-wm8903-ventana",
|
|
|
|
|
"nvidia,tegra-audio-wm8903";
|
|
|
|
|
nvidia,model = "NVIDIA Tegra Ventana";
|
|
|
|
|
|
|
|
|
|
nvidia,audio-routing =
|
|
|
|
|
"Headphone Jack", "HPOUTR",
|
|
|
|
|
"Headphone Jack", "HPOUTL",
|
|
|
|
|
"Int Spk", "ROP",
|
|
|
|
|
"Int Spk", "RON",
|
|
|
|
|
"Int Spk", "LOP",
|
|
|
|
|
"Int Spk", "LON",
|
|
|
|
|
"Mic Jack", "MICBIAS",
|
|
|
|
|
"IN1L", "Mic Jack";
|
|
|
|
|
|
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
|
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
|
|
|
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
|
|
|
|
|
GPIO_ACTIVE_HIGH>;
|
|
|
|
|
nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
|
|
|
|
|
GPIO_ACTIVE_HIGH>;
|
|
|
|
|
|
|
|
|
|
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
|
|
|
|
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
|
|
|
|
<&tegra_car TEGRA20_CLK_CDEV1>;
|
|
|
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
|
|
|
};
|
2012-05-23 07:46:15 +00:00
|
|
|
};
|
