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u-boot/board/toradex/colibri_vf/Kconfig

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ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 10:54:26 +00:00
if TARGET_COLIBRI_VF
config SYS_BOARD
default "colibri_vf"
config SYS_VENDOR
default "toradex"
config SYS_CONFIG_NAME
default "colibri_vf"
apalis/colibri_imx7/pxa270/t20/t30/vf: integrate config block handling With our common code in place actually make use of it across all our modules. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2016-11-16 16:49:23 +00:00
config TDX_CFG_BLOCK
default y
config TDX_HAVE_NAND
default y
config TDX_CFG_BLOCK_OFFSET
default "2048"
config TDX_CFG_BLOCK_2ND_ETHADDR
default y
imx: Finish migration of IMX_CONFIG to Kconfig - Provide a default Kconfig value of the default script - Largely continue to define this via the board Kconfig file - For the boards that select a script based on defconfig rather than TARGET, keep this within the defconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-25 00:41:00 +00:00
config IMX_CONFIG
default "board/toradex/colibri_vf/imximage.cfg"
apalis/colibri_imx7/pxa270/t20/t30/vf: integrate config block handling With our common code in place actually make use of it across all our modules. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2016-11-16 16:49:23 +00:00
source "board/toradex/common/Kconfig"
ARM: vf610: Initial integration for Colibri VF50/VF61 This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
2015-04-15 10:54:26 +00:00
endif
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