u-boot/arch/arm/include/asm/mach-imx/mu_hal.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright 2021 NXP
 */

#ifndef __SNT_MU_HAL_H__
#define __SNT_MU_HAL_H__

void mu_hal_init(ulong base);
int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg);
int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg);
#endif
arm: imx8ulp: release and configure XRDC at early phase Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 2021-08-07 08:00:55 +00:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
			`/*`
			`* Copyright 2021 NXP`
			`*/`

misc: imx: S400_API: Move S400 MU and API to a common place Since iMX9 uses S401 which shares the API with iMX8ULP. So move S400 MU driver and API to a common place and selected by CONFIG_IMX_SENTINEL Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 2022-07-26 08:40:49 +00:00			`#ifndef __SNT_MU_HAL_H__`
			`#define __SNT_MU_HAL_H__`
arm: imx8ulp: release and configure XRDC at early phase Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 2021-08-07 08:00:55 +00:00
			`void mu_hal_init(ulong base);`
			`int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg);`
			`int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg);`
			`#endif`