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ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_ARM=y
Convert CONFIG_ARCH_CPU_INIT to Kconfig This converts the following to Kconfig: CONFIG_ARCH_CPU_INIT Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Tested-by: Felix Brack <fb@ltec.ch>
2019-08-14 13:29:25 +00:00
CONFIG_ARCH_CPU_INIT=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_ARCH_RMOBILE=y
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-21 00:22:39 +00:00
CONFIG_TEXT_BASE=0x18000000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-01 12:19:22 +00:00
CONFIG_SYS_MALLOC_LEN=0x100000
Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000 The most commonly used value today is 0x2000 and not 0x400. Rework the Kconfig logic to use this more frequently used value as the default. Cc: Andrew F. Davis <afd@ti.com> Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Cc: Alison Wang <alison.wang@nxp.com> Cc: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Cc: Andes <uboot@andestech.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bharat Gooty <bharat.gooty@broadcom.com> Cc: David Lechner <david@lechnology.com> Cc: Dzmitry Sankouski <dsankouski@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@gmail.com> Cc: Eugeniy Paltsev <paltsev@synopsys.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Gerald Kerma <dreagle@doukki.net> Cc: Gregory CLEMENT <gregory.clement@bootlin.com> Cc: Holger Brunck <holger.brunck@hitachienergy.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Jassi Brar <jaswinder.singh@linaro.org> Cc: Kristian Amlie <kristian.amlie@northern.tech> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Liviu Dudau <liviu.dudau@foss.arm.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org> Cc: Matthias Brugger <mbrugger@suse.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Cc: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Paul Burton <paul.burton@mips.com> Cc: Paul Kocialkowski <contact@paulk.fr> Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Bosch <stefan_b@posteo.net> Cc: Stephan Gerhold <stephan@gerhold.net> Cc: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Thomas Weber <weber@corscience.de> Cc: Tony Dinh <mibodhi@gmail.com> Cc: Trevor Woerner <twoerner@gmail.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: liuhao <liuhao@phytium.com.cn> Cc: lixinde <lixinde@phytium.com.cn> Cc: shuyiqi <shuyiqi@phytium.com.cn> Cc: weichangzheng <weichangzheng@phytium.com.cn> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
2022-04-07 16:33:23 +00:00
CONFIG_SYS_MALLOC_F_LEN=0x400
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-08-10 19:31:07 +00:00
CONFIG_NR_DRAM_BANKS=1
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-02-17 14:58:06 +00:00
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20900000
env: Finish migration of common ENV options - In ARMv8 NXP Layerscape platforms we also need to make use of CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so. - On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define to 0. - Add Kconfig entry for ENV_ADDR. - Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it. - Add ENV_xxx_REDUND options that depend on their primary option and SYS_REDUNDAND_ENVIRONMENT - On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR for the pre-main-U-Boot environment location. - On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but rather it being non-zero, as it will now be zero by default. - Rework the env_offset absolute in env/embedded.o to not use CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within ENV_IS_IN_FLASH. - Migrate all platforms. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: uboot-stm32@st-md-mailman.stormreply.com Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-19 01:02:10 +00:00
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x80000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 20:15:47 +00:00
CONFIG_ENV_SECT_SIZE=0x10000
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-22 18:38:00 +00:00
CONFIG_DM_GPIO=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-28 12:46:52 +00:00
CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot"
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-28 14:17:29 +00:00
CONFIG_RZA1=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-01 15:50:26 +00:00
CONFIG_OF_LIBFDT_OVERLAY=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2023-05-29 14:43:26 +00:00
CONFIG_SYS_MONITOR_LEN=524288
Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-14 18:36:40 +00:00
CONFIG_SYS_CLK_FREQ=66666666
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-23 14:25:31 +00:00
CONFIG_SYS_LOAD_ADDR=0x20400000
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_BOOTDELAY=3
Convert CONFIG_BOOTARGS to Kconfig This converts the following to Kconfig: CONFIG_BOOTARGS Signed-off-by: Tom Rini <trini@konsulko.com>
2020-06-16 23:06:12 +00:00
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="ignore_loglevel"
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
# CONFIG_DISPLAY_CPUINFO is not set
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-05 17:11:41 +00:00
# CONFIG_BOARD_EARLY_INIT_F is not set
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_HUSH_PARSER=y
Convert CONFIG_SYS_CBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_CBSIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-11 22:01:06 +00:00
CONFIG_SYS_CBSIZE=256
Convert CONFIG_SYS_PBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_PBSIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-05-11 21:38:09 +00:00
CONFIG_SYS_PBSIZE=256
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
# CONFIG_CMD_ELF is not set
CONFIG_CMD_GPIO=y
ARM: renesas: Enable R8A66597 USB host on GR Peach Enable USB host support on GR Peach board. To use USB host on GR Peach, it might be necessary to solder JP3 header onto the board first and then short it. Shorting JP3 is mandatory to let the U5 regulator to supply VBUS to the CN3 USB port. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-11 11:22:32 +00:00
CONFIG_CMD_USB=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MAC_PARTITION=y
CONFIG_OF_CONTROL=y
Convert CONFIG_ENV_OVERWRITE to Kconfig This converts the following to Kconfig: CONFIG_ENV_OVERWRITE Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rerun migration, remove some comments] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-07-03 11:48:56 +00:00
CONFIG_ENV_OVERWRITE=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_SPI_MAX_HZ=50000000
env: Add CONFIG_SYS_RELOC_GD_ENV_ADDR symbol Today in initr_reloc_global_data() we use some non-obvious tests to determine if we need to relocate the env_addr within gd or not. In order to facilitate migration of other symbols to Kconfig we need to introduce a new symbol for this particular use case. Cc: Wolfgang Denk <wd@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-13 03:46:36 +00:00
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_RZA1_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
mtd: ensure MTD is compiled when there is a SPI NOR flash using MTD MTD must be enabled when there is a SPI NOR flash using the SPI_FLASH_MTD config entry. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-10-03 17:50:08 +00:00
CONFIG_MTD=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-04 22:18:38 +00:00
CONFIG_DM_SPI_FLASH=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_SPI_FLASH_MACRONIX=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Convert CONFIG_PHYLIB et al to Kconfig This converts the following to Kconfig: CONFIG_PHYLIB CONFIG_BITBANGMII CONFIG_MV88E6352_SWITCH CONFIG_MV88E61XX_SWITCH CONFIG_PHYLIB_10G CONFIG_PHY_AQUANTIA CONFIG_PHY_ATHEROS CONFIG_PHY_BROADCOM CONFIG_PHY_CORTINA CONFIG_PHY_DAVICOM CONFIG_PHY_ET1011C CONFIG_PHY_LXT CONFIG_PHY_MARVELL CONFIG_PHY_MICREL CONFIG_PHY_NATSEMI CONFIG_PHY_REALTEK CONFIG_RTL8211X_PHY_FORCE_MASTER CONFIG_PHY_SMSC CONFIG_PHY_TERANETICS CONFIG_PHY_TI CONFIG_PHY_VITESSE CONFIG_PHY_XILINX Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-24 19:35:53 +00:00
CONFIG_BITBANGMII=y
Convert CONFIG_BITBANGMII_MULTI to Kconfig This converts the following to Kconfig: CONFIG_BITBANGMII_MULTI Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-22 01:33:31 +00:00
CONFIG_BITBANGMII_MULTI=y
ARM: renesas: Enable DM_ETH_PHY and SMSC PHY driver The board comes with SMSC LAN8710A PHY, enable matching driver. Enable DM_ETH_PHY in the process to start using DM drivers more. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> --- Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@amd.com> Cc: Nishanth Menon <nm@ti.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2023-05-29 18:28:54 +00:00
CONFIG_PHY_SMSC=y
CONFIG_DM_ETH_PHY=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_SH_ETHER=y
CONFIG_PINCTRL=y
ARM: renesas: Enable R8A66597 USB host on GR Peach Enable USB host support on GR Peach board. To use USB host on GR Peach, it might be necessary to solder JP3 header onto the board first and then short it. Shorting JP3 is mandatory to let the U5 regulator to supply VBUS to the CN3 USB port. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-11 11:22:32 +00:00
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_RENESAS_RPC_SPI=y
CONFIG_TIMER=y
CONFIG_RENESAS_OSTM_TIMER=y
ARM: renesas: Enable R8A66597 USB host on GR Peach Enable USB host support on GR Peach board. To use USB host on GR Peach, it might be necessary to solder JP3 header onto the board first and then short it. Shorting JP3 is mandatory to let the U5 regulator to supply VBUS to the CN3 USB port. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com>
2019-08-11 11:22:32 +00:00
CONFIG_USB=y
CONFIG_USB_R8A66597_HCD=y
CONFIG_USB_STORAGE=y
ARM: dts: renesas: Add RZ/A1 GR-Peach board Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-08-23 19:53:59 +00:00
# CONFIG_EFI_LOADER is not set
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