Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-07 21:54:45 +00:00
Code Issues Projects Releases Packages Wiki Activity
u-boot/configs/imx8mq_evk_defconfig

38 lines
922 B
Text
Raw Normal View History

imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_TEXT_BASE=0x40200000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_IMX8MQ_EVK=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-07 22:46:19 +00:00
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL=y
imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_FIT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-07 22:46:19 +00:00
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_SPL_LOAD_FIT=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-07 22:46:19 +00:00
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg"
imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_SPL_BOARD_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-19 14:39:42 +00:00
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_OF_CONTROL=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-07 22:46:19 +00:00
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mq-evk"
imx8mq_evk: Move CONFIG_ENV_IS_IN_MMC to Kconfig Currently the command "saveenv" is not available. The CONFIG_ENV_IS_IN_MMC symbol has been converted to Kconfig, so fix the problem by moving it to the defconfig. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-02-28 11:46:14 +00:00
CONFIG_ENV_IS_IN_MMC=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-07 22:46:19 +00:00
CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-01-07 22:46:19 +00:00
CONFIG_SYS_I2C_MXC=y
imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_DM_MMC=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
imx8mq_evk_defconfig: Enable pinctrl driver The Ethernet controller is not able to initialise correctly without the pinctrl driver. This config setting was enabled in the initial version of this file, but was removed by a savedefconfig resync because the parameter did not actually exist at that point. Fixes: 1bac199e8c87 ("configs: Resync with savedefconfig") Signed-off-by: Chris Spencer <christopher.spencer@sea.co.uk> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-02-04 10:05:34 +00:00
CONFIG_PINCTRL_IMX8M=y
imx: add i.MX8MQ EVK support Add i.MX8MQ EVK support. SPL will initialize ddr and load ddr phy firmware. Then loading FIT image, ATF to OCRAM, U-Boot and DTB to DRAM. The boot log with Arm trusted firmware console enabled: " U-Boot SPL 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) PMIC: PFUZE100 ID=0x10 Normal Boot Trying to boot from MMC2 NOTICE: Configureing TZASC380 NOTICE: BL31: v1.5(release):p9.0.0_1.0.0-beta-20180928-8-ge09c4b62-dirty NOTICE: BL31: Built : 09:28:54, Nov 8 2018 lpddr4 swffc start NOTICE: sip svc init U-Boot 2018.11-00142-g9ae14e7274 (Nov 20 2018 - 18:13:16 +0800) CPU: Freescale i.MX8MQ rev2.0 at 1000 MHz Reset cause: POR Model: Freescale i.MX8MQ EVK DRAM: 3 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 using MAC address from ROM eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 " Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2018-11-20 10:20:00 +00:00
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_THERMAL=y
Reference in a new issue Copy permalink