2019-08-20 09:35:29 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0+ OR X11
|
|
|
|
/*
|
|
|
|
* P2020RDB-PC Device Tree Source
|
|
|
|
*
|
|
|
|
* Copyright 2013 - 2015 Freescale Semiconductor Inc.
|
|
|
|
* Copyright 2019 NXP
|
|
|
|
*/
|
|
|
|
|
|
|
|
/include/ "p2020.dtsi"
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "fsl,P2020RDB-PC";
|
|
|
|
compatible = "fsl,P2020RDB-PC";
|
|
|
|
#address-cells = <2>;
|
|
|
|
#size-cells = <2>;
|
|
|
|
interrupt-parent = <&mpic>;
|
|
|
|
|
|
|
|
soc: soc@ffe00000 {
|
|
|
|
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
|
|
|
};
|
2019-08-27 11:04:15 +00:00
|
|
|
|
|
|
|
pci2: pcie@ffe08000 {
|
|
|
|
reg = <0x0 0xffe08000 0x0 0x1000>; /* registers */
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
pci1: pcie@ffe09000 {
|
|
|
|
reg = <0x0 0xffe09000 0x0 0x1000>; /* registers */
|
|
|
|
ranges = <0x01000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x00010000 /* downstream I/O */
|
|
|
|
0x02000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000>; /* non-prefetchable memory */
|
|
|
|
};
|
|
|
|
|
|
|
|
pci0: pcie@ffe0a000 {
|
|
|
|
reg = <0x0 0xffe0a000 0x0 0x1000>; /* registers */
|
|
|
|
ranges = <0x01000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x00010000 /* downstream I/O */
|
|
|
|
0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x20000000>; /* non-prefetchable memory */
|
|
|
|
};
|
2019-08-20 09:35:29 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/include/ "p2020-post.dtsi"
|