u-boot/arch/x86/cpu/braswell/Kconfig

# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>

config INTEL_BRASWELL
	bool
	select HAVE_FSP
	select ARCH_MISC_INIT
	select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
	imply HAVE_INTEL_ME
	imply HAVE_VBT
	imply ENABLE_MRC_CACHE
	imply AHCI_PCI
	imply ICH_SPI
	imply MMC
	imply MMC_PCI
	imply MMC_SDHCI
	imply MMC_SDHCI_SDMA
	imply SCSI
	imply SCSI_AHCI
	imply SPI_FLASH
	imply SYS_NS16550
	imply USB
	imply USB_XHCI_HCD
	imply VIDEO_FSP

if INTEL_BRASWELL

config FSP_ADDR
	hex
	default 0xfff20000

endif
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 2018-05-06 21:58:06 +00:00			`# SPDX-License-Identifier: GPL-2.0+`
x86: Add Intel Braswell SoC support This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 2017-08-16 05:41:58 +00:00			`#`
			`# Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com>`

			`config INTEL_BRASWELL`
			`bool`
			`select HAVE_FSP`
			`select ARCH_MISC_INIT`
			`select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED`
			`imply HAVE_INTEL_ME`
			`imply HAVE_VBT`
			`imply ENABLE_MRC_CACHE`
			`imply AHCI_PCI`
			`imply ICH_SPI`
			`imply MMC`
			`imply MMC_PCI`
			`imply MMC_SDHCI`
			`imply MMC_SDHCI_SDMA`
			`imply SCSI`
ata: Migrate CONFIG_SCSI_AHCI to Kconfig And use 'imply' liberally. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> 2017-12-08 13:36:19 +00:00			`imply SCSI_AHCI`
x86: Add Intel Braswell SoC support This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> 2017-08-16 05:41:58 +00:00			`imply SPI_FLASH`
			`imply SYS_NS16550`
			`imply USB`
			`imply USB_XHCI_HCD`
			`imply VIDEO_FSP`

			`if INTEL_BRASWELL`

			`config FSP_ADDR`
			`hex`
			`default 0xfff20000`

			`endif`