u-boot/arch/arm/dts/uniphier-ph1-pro4.dtsi

/*
 * Device Tree Source for UniPhier PH1-Pro4 SoC
 *
 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+	X11
 */

/include/ "skeleton.dtsi"

/ {
	compatible = "socionext,ph1-pro4";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "socionext,uniphier-smp";

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <1>;
		};
	};

	clocks {
		arm_timer_clk: arm_timer_clk {
			#clock-cells = <0>;
			compatible = "fixed-clock";
			clock-frequency = <50000000>;
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		interrupt-parent = <&intc>;

		extbus: extbus {
			compatible = "simple-bus";
			#address-cells = <2>;
			#size-cells = <1>;
		};

		uart0: serial@54006800 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006800 0x20>;
			clock-frequency = <73728000>;
		};

		uart1: serial@54006900 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006900 0x20>;
			clock-frequency = <73728000>;
		};

		uart2: serial@54006a00 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006a00 0x20>;
			clock-frequency = <73728000>;
		};

		uart3: serial@54006b00 {
			compatible = "socionext,uniphier-uart";
			status = "disabled";
			reg = <0x54006b00 0x20>;
			clock-frequency = <73728000>;
		};

		i2c0: i2c@58780000 {
			compatible = "socionext,uniphier-fi2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x58780000 0x80>;
			clock-frequency = <100000>;
			status = "disabled";
		};

		i2c1: i2c@58781000 {
			compatible = "socionext,uniphier-fi2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x58781000 0x80>;
			clock-frequency = <100000>;
			status = "disabled";
		};

		i2c2: i2c@58782000 {
			compatible = "socionext,uniphier-fi2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x58782000 0x80>;
			clock-frequency = <100000>;
			status = "disabled";
		};

		i2c3: i2c@58783000 {
			compatible = "socionext,uniphier-fi2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x58783000 0x80>;
			clock-frequency = <100000>;
			status = "disabled";
		};

		/* i2c4 does not exist */

		i2c5: i2c@58785000 {
			compatible = "socionext,uniphier-fi2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x58785000 0x80>;
			clock-frequency = <400000>;
			status = "ok";
		};

		i2c6: i2c@58786000 {
			compatible = "socionext,uniphier-fi2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x58786000 0x80>;
			clock-frequency = <400000>;
			status = "ok";
		};

		system-bus-controller-misc@59800000 {
			compatible = "socionext,uniphier-system-bus-controller-misc",
				     "syscon";
			reg = <0x59800000 0x2000>;
		};

		usb2: usb@5a800100 {
			compatible = "socionext,uniphier-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x5a800100 0x100>;
		};

		usb3: usb@5a810100 {
			compatible = "socionext,uniphier-ehci", "generic-ehci";
			status = "disabled";
			reg = <0x5a810100 0x100>;
		};

		usb0: usb@65a00000 {
			compatible = "socionext,uniphier-xhci", "generic-xhci";
			status = "disabled";
			reg = <0x65a00000 0x100>;
		};

		usb1: usb@65c00000 {
			compatible = "socionext,uniphier-xhci", "generic-xhci";
			status = "disabled";
			reg = <0x65c00000 0x100>;
		};

		timer@60000200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0x60000200 0x20>;
			interrupts = <1 11 0x304>;
			clocks = <&arm_timer_clk>;
		};

		timer@60000600 {
			compatible = "arm,cortex-a9-twd-timer";
			reg = <0x60000600 0x20>;
			interrupts = <1 13 0x304>;
			clocks = <&arm_timer_clk>;
		};

		intc: interrupt-controller@60001000 {
			compatible = "arm,cortex-a9-gic";
			#interrupt-cells = <3>;
			interrupt-controller;
			reg = <0x60001000 0x1000>,
			      <0x60000100 0x100>;
		};

		nand: nand@68000000 {
			compatible = "denali,denali-nand-dt";
			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
			reg-names = "nand_data", "denali_reg";
		};
	};
};