u-boot/arch/arm/mach-rockchip/rk3288/Makefile

#
# Copyright (c) 2015 Google, Inc
#
# SPDX-License-Identifier:      GPL-2.0+
#

obj-y += reset_rk3288.o
obj-y += sdram_rk3288.o
obj-y += syscon_rk3288.o
rockchip: rk3288: Add SoC reset driver We can reset the SoC using some CRU (clock/reset unit) registers. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-30 22:55:33 +00:00			`#`
			`# Copyright (c) 2015 Google, Inc`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

			`obj-y += reset_rk3288.o`
rockchip: rk3288: Add SDRAM init Add code to set up the SDRAM in SPL, ready for loading U-Boot. This uses device tree for configuration so should be able to support other RAM configurations. It may be possible to generalise the code to support other SoCs at some point. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-30 22:55:36 +00:00			`obj-y += sdram_rk3288.o`
rockchip: rk3288: Add a simple syscon driver Add a driver that provides access to system controllers. Signed-off-by: Simon Glass <sjg@chromium.org> 2015-08-30 22:55:34 +00:00			`obj-y += syscon_rk3288.o`