2014-11-26 09:33:59 +00:00
|
|
|
/*
|
|
|
|
* Device Tree Source for UniPhier PH1-LD4 SoC
|
|
|
|
*
|
2015-06-30 09:27:00 +00:00
|
|
|
* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
|
2014-11-26 09:33:59 +00:00
|
|
|
*
|
2015-06-30 09:27:01 +00:00
|
|
|
* SPDX-License-Identifier: GPL-2.0+ X11
|
2014-11-26 09:33:59 +00:00
|
|
|
*/
|
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
/include/ "uniphier-common32.dtsi"
|
2014-11-26 09:33:59 +00:00
|
|
|
|
|
|
|
/ {
|
2015-03-11 06:54:46 +00:00
|
|
|
compatible = "socionext,ph1-ld4";
|
2014-11-26 09:33:59 +00:00
|
|
|
|
|
|
|
cpus {
|
|
|
|
#address-cells = <1>;
|
2014-12-05 15:03:23 +00:00
|
|
|
#size-cells = <0>;
|
2014-11-26 09:33:59 +00:00
|
|
|
|
|
|
|
cpu@0 {
|
|
|
|
device_type = "cpu";
|
|
|
|
compatible = "arm,cortex-a9";
|
|
|
|
reg = <0>;
|
2015-12-16 01:54:08 +00:00
|
|
|
next-level-cache = <&l2>;
|
2014-11-26 09:33:59 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2015-06-30 09:27:00 +00:00
|
|
|
clocks {
|
|
|
|
arm_timer_clk: arm_timer_clk {
|
|
|
|
#clock-cells = <0>;
|
|
|
|
compatible = "fixed-clock";
|
|
|
|
clock-frequency = <50000000>;
|
|
|
|
};
|
2015-08-28 13:33:13 +00:00
|
|
|
|
|
|
|
uart_clk: uart_clk {
|
|
|
|
#clock-cells = <0>;
|
|
|
|
compatible = "fixed-clock";
|
|
|
|
clock-frequency = <36864000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
iobus_clk: iobus_clk {
|
|
|
|
#clock-cells = <0>;
|
|
|
|
compatible = "fixed-clock";
|
|
|
|
clock-frequency = <100000000>;
|
|
|
|
};
|
2015-06-30 09:27:00 +00:00
|
|
|
};
|
2015-12-16 01:54:07 +00:00
|
|
|
};
|
2015-06-30 09:27:00 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
&soc {
|
2015-12-16 01:54:08 +00:00
|
|
|
l2: l2-cache@500c0000 {
|
|
|
|
compatible = "socionext,uniphier-system-cache";
|
|
|
|
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
|
|
|
|
interrupts = <0 174 4>, <0 175 4>;
|
|
|
|
cache-unified;
|
|
|
|
cache-size = <(512 * 1024)>;
|
|
|
|
cache-sets = <256>;
|
|
|
|
cache-line-size = <128>;
|
|
|
|
cache-level = <2>;
|
|
|
|
};
|
|
|
|
|
2016-02-16 08:03:51 +00:00
|
|
|
port0x: gpio@55000008 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000008 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port1x: gpio@55000010 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000010 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port2x: gpio@55000018 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000018 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port3x: gpio@55000020 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000020 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port4: gpio@55000028 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000028 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port5x: gpio@55000030 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000030 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port6x: gpio@55000038 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000038 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port7x: gpio@55000040 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000040 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port8x: gpio@55000048 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000048 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port9x: gpio@55000050 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000050 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port10x: gpio@55000058 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000058 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port11x: gpio@55000060 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000060 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port12x: gpio@55000068 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000068 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port13x: gpio@55000070 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000070 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port14x: gpio@55000078 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000078 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
|
|
|
port16x: gpio@55000088 {
|
|
|
|
compatible = "socionext,uniphier-gpio";
|
|
|
|
reg = <0x55000088 0x8>;
|
|
|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
};
|
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
i2c0: i2c@58400000 {
|
|
|
|
compatible = "socionext,uniphier-i2c";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x58400000 0x40>;
|
2014-11-26 09:33:59 +00:00
|
|
|
#address-cells = <1>;
|
2015-12-16 01:54:07 +00:00
|
|
|
#size-cells = <0>;
|
|
|
|
interrupts = <0 41 1>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_i2c0>;
|
|
|
|
clocks = <&iobus_clk>;
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
};
|
2014-12-05 15:03:23 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
i2c1: i2c@58480000 {
|
|
|
|
compatible = "socionext,uniphier-i2c";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x58480000 0x40>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
interrupts = <0 42 1>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
clocks = <&iobus_clk>;
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
};
|
2014-12-05 15:03:23 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
/* chip-internal connection for DMD */
|
|
|
|
i2c2: i2c@58500000 {
|
|
|
|
compatible = "socionext,uniphier-i2c";
|
|
|
|
reg = <0x58500000 0x40>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
interrupts = <0 43 1>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
clocks = <&iobus_clk>;
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
};
|
2015-06-30 09:27:00 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
i2c3: i2c@58580000 {
|
|
|
|
compatible = "socionext,uniphier-i2c";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x58580000 0x40>;
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
interrupts = <0 44 1>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
|
|
clocks = <&iobus_clk>;
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
};
|
2014-11-26 09:34:01 +00:00
|
|
|
|
2016-02-18 10:52:50 +00:00
|
|
|
sd: sdhc@5a400000 {
|
|
|
|
compatible = "socionext,uniphier-sdhc";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x5a400000 0x200>;
|
|
|
|
interrupts = <0 76 4>;
|
|
|
|
pinctrl-names = "default", "1.8v";
|
|
|
|
pinctrl-0 = <&pinctrl_sd>;
|
|
|
|
pinctrl-1 = <&pinctrl_sd_1v8>;
|
|
|
|
clocks = <&mio 0>;
|
|
|
|
bus-width = <4>;
|
|
|
|
};
|
|
|
|
|
|
|
|
emmc: sdhc@5a500000 {
|
|
|
|
compatible = "socionext,uniphier-sdhc";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x5a500000 0x200>;
|
|
|
|
interrupts = <0 78 4>;
|
|
|
|
pinctrl-names = "default", "1.8v";
|
|
|
|
pinctrl-0 = <&pinctrl_emmc>;
|
|
|
|
pinctrl-1 = <&pinctrl_emmc_1v8>;
|
|
|
|
clocks = <&mio 1>;
|
|
|
|
bus-width = <8>;
|
|
|
|
non-removable;
|
|
|
|
};
|
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
usb0: usb@5a800100 {
|
|
|
|
compatible = "socionext,uniphier-ehci", "generic-ehci";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x5a800100 0x100>;
|
|
|
|
interrupts = <0 80 4>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usb0>;
|
2016-02-02 12:11:37 +00:00
|
|
|
clocks = <&mio 3>, <&mio 6>;
|
2015-12-16 01:54:07 +00:00
|
|
|
};
|
2014-11-26 09:34:01 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
usb1: usb@5a810100 {
|
|
|
|
compatible = "socionext,uniphier-ehci", "generic-ehci";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x5a810100 0x100>;
|
|
|
|
interrupts = <0 81 4>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usb1>;
|
2016-02-02 12:11:37 +00:00
|
|
|
clocks = <&mio 4>, <&mio 6>;
|
2015-12-16 01:54:07 +00:00
|
|
|
};
|
2015-08-28 13:33:13 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
usb2: usb@5a820100 {
|
|
|
|
compatible = "socionext,uniphier-ehci", "generic-ehci";
|
|
|
|
status = "disabled";
|
|
|
|
reg = <0x5a820100 0x100>;
|
|
|
|
interrupts = <0 82 4>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usb2>;
|
2016-02-02 12:11:37 +00:00
|
|
|
clocks = <&mio 5>, <&mio 6>;
|
2015-12-16 01:54:07 +00:00
|
|
|
};
|
2016-06-29 10:39:02 +00:00
|
|
|
|
|
|
|
aidet@61830000 {
|
|
|
|
compatible = "simple-mfd", "syscon";
|
|
|
|
reg = <0x61830000 0x200>;
|
|
|
|
};
|
2015-12-16 01:54:07 +00:00
|
|
|
};
|
2014-12-05 15:03:23 +00:00
|
|
|
|
2016-02-02 12:11:33 +00:00
|
|
|
&refclk {
|
|
|
|
clock-frequency = <24576000>;
|
|
|
|
};
|
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
&serial0 {
|
|
|
|
clock-frequency = <36864000>;
|
|
|
|
};
|
2015-06-30 09:27:00 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
&serial1 {
|
|
|
|
clock-frequency = <36864000>;
|
|
|
|
};
|
2015-06-30 09:27:00 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
&serial2 {
|
|
|
|
clock-frequency = <36864000>;
|
|
|
|
};
|
2015-06-30 09:27:00 +00:00
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
&serial3 {
|
|
|
|
interrupts = <0 29 4>;
|
|
|
|
clock-frequency = <36864000>;
|
2014-11-26 09:33:59 +00:00
|
|
|
};
|
2015-08-28 13:33:13 +00:00
|
|
|
|
2016-02-02 12:11:36 +00:00
|
|
|
&mio {
|
|
|
|
compatible = "socionext,ph1-ld4-mioctrl";
|
|
|
|
clock-names = "stdmac", "ehci";
|
|
|
|
clocks = <&sysctrl 10>, <&sysctrl 18>;
|
|
|
|
};
|
|
|
|
|
2016-02-02 12:11:35 +00:00
|
|
|
&peri {
|
|
|
|
compatible = "socionext,ph1-ld4-perictrl";
|
|
|
|
clock-names = "uart", "i2c";
|
|
|
|
clocks = <&sysctrl 3>, <&sysctrl 4>;
|
|
|
|
};
|
|
|
|
|
2015-12-16 01:54:07 +00:00
|
|
|
&pinctrl {
|
2016-06-29 10:38:56 +00:00
|
|
|
compatible = "socionext,uniphier-ld4-pinctrl";
|
2015-12-16 01:54:07 +00:00
|
|
|
};
|
2016-02-02 12:11:34 +00:00
|
|
|
|
|
|
|
&sysctrl {
|
|
|
|
compatible = "socionext,ph1-ld4-sysctrl";
|
|
|
|
};
|